Pritesh Raithatha 986e333dc3 Tegra: smmu: platform handler for SMMU settings ... This patch empowers the platforms to provide an array with the registers that must be saved/restored across System Suspend. Original-change-by: Pritesh Raithatha <praithatha@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2017-04-13 12:34:54 -07:00
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t132	Tegra: GIC: enable FIQ interrupt handling	2017-02-28 08:50:01 -08:00
t186	Tegra: smmu: platform handler for SMMU settings	2017-04-13 12:34:54 -07:00
t210	plat/tegra: Enable Cortex-A53 erratum 855873 workaround	2017-03-20 10:57:50 +00:00