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arm-trusted-firmware/plat/marvell/armada/a3k/common/include
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Konstantin Porotchkin 270367fbf7 plat: marvell: armada: a3k: allow image load to RAM address 0 
Marvell uses RAM address 0x0 for loading BL33 stage images.
When ATF is built with DEBUG=1, its IO subsystem fails on
assert checking the destination RAM address != 0.
This patch adds PLAT_ALLOW_ZERO_ADDR_COPY to A3K platform
allowing to bypass the above check in debug mode.

Change-Id: I687e35cb2e9dc3166bdaa81b3904c20b784c5c6a
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
 		2020-10-04 15:56:40 +02:00
..
a3700_plat_def.h plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs 2020-06-18 20:57:45 +02:00
a3700_pm.h plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs 2020-06-18 20:57:45 +02:00
ddr_info.h plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs 2020-06-18 20:57:45 +02:00
dram_win.h plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs 2020-06-18 20:57:45 +02:00
io_addr_dec.h plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs 2020-06-18 20:57:45 +02:00
plat_macros.S plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs 2020-06-18 20:57:45 +02:00
platform_def.h plat: marvell: armada: a3k: allow image load to RAM address 0 2020-10-04 15:56:40 +02:00