Vijayenthiran Subramaniam 9d3b191a48 drivers/tzc-dmc620: add driver to setup DMC-620 TZC controller ... ARM CoreLink DMC-620 Dynamic Memory Controller includes a TZC controller to setup secure or non-secure regions of DRAM memory. The TZC controller allows to setup upto eight such regions of memory in DRAM. This driver provides helper functions to setup the TZC controller within DMC-620. Change-Id: Iee7692417c2080052bdb7b1c2873a024bc5d1d10 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>		2018-11-21 19:25:35 +05:30
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cci	Mark GICV3, CCI and CCN boot time code as init	2018-10-03 11:48:15 +01:00
ccn	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
gic	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
pl011	Multi-console: Deprecate the `finish_console_register` macro	2018-10-19 17:34:52 +01:00
pl061	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
smmu	Mark GICV3, CCI and CCN boot time code as init	2018-10-03 11:48:15 +01:00
sp804	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
sp805	Fix MISRA defects in SP805 driver	2018-07-30 09:30:15 +01:00
tzc	drivers/tzc-dmc620: add driver to setup DMC-620 TZC controller	2018-11-21 19:25:35 +05:30