9eceb020d7
Neoverse N1 erratum 1220197 is a Cat B erratum [1], present in older revisions of the Neoverse N1 processor core. The workaround is to set two bits in the implementation defined CPUECTLR_EL1 system register, which disables write streaming to the L2. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html Change-Id: I9c3373f1b6d67d21ee71b2b80aec5e96826818e8 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
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| .. | ||
| auth-framework.rst | ||
| cpu-specific-build-macros.rst | ||
| firmware-design.rst | ||
| index.rst | ||
| interrupt-framework-design.rst | ||
| psci-pd-tree.rst | ||
| reset-design.rst | ||
| trusted-board-boot.rst | ||