arm-trusted-firmware/drivers/arm/gic/v3
Varun Wadekar 2c248ade2e feat(gic600ae): introduce support for Fault Management Unit
The FMU is part of the GIC Distributor (GICD) component. It implements
the following functionality in GIC-600AE:

* Provides software the means to enable or disable a Safety Mechanism
  within a GIC block.
* Receives error signaling from all Safety Mechanisms within other GIC
  blocks.
* Maintains error records for each GIC block, for software inspection
  and provides information on the source of the error.
* Retains error records across functional reset.
* Enables software error recovery testing by providing error injection
  capabilities in a Safety Mechanism.

This patch introduces support to enable error detection for all safety
mechanisms provided by the FMU. Platforms are expected to invoke the
initialization function during cold boot.

The support for the FMU is guarded by the GICV3_SUPPORT_GIC600AE_FMU
makefile variable. The default value of this variable is '0'.

Change-Id: I421c3d059624ddefd174cb1140a2d2a2296be0c6
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2021-09-01 08:24:33 -07:00
..
arm_gicv3_common.c Sanitise includes across codebase 2019-01-04 10:43:17 +00:00
gic-x00.c GIC-600: Fix MISRA-2012 defects 2020-07-29 16:51:05 +00:00
gic600_multichip.c GIC-600: Fix include ordering according to the coding style 2019-11-19 11:38:33 +00:00
gic600_multichip_private.h gic multichip: add support for clayton 2020-04-07 18:41:13 +05:30
gic600ae_fmu.c feat(gic600ae): introduce support for Fault Management Unit 2021-09-01 08:24:33 -07:00
gic600ae_fmu_helpers.c feat(gic600ae): introduce support for Fault Management Unit 2021-09-01 08:24:33 -07:00
gicdv3_helpers.c TF-A GICv3 driver: Add extended PPI and SPI range 2020-04-06 16:27:54 +01:00
gicrv3_helpers.c TF-A GICv3 driver: Change API for GICR_IPRIORITYR accessors 2020-04-07 18:40:44 +01:00
gicv3.mk feat(gic600ae): introduce support for Fault Management Unit 2021-09-01 08:24:33 -07:00
gicv3_helpers.c refactor(gicv3): use helper functions to get SPI/ESPI INTID limit 2021-06-16 09:37:14 +08:00
gicv3_main.c fix(gicv3): add dsb in both disable and enable function of gicv3_cpuif 2021-07-23 10:48:00 +08:00
gicv3_private.h refactor(gicv3): add helper function to get the limit of ESPI INTID 2021-06-16 09:24:31 +08:00