Caesar Wang a14e091621 rockchip: disable watchdog during suspend ... The CA53 and CM0 WDT clock gating in rk3399 SGRF, and ATF is in charge of it because the kernel can't touch SGRF. Basically the WDT didn't stop at suspend time, it just switched from the 24M to the 32k clock. That meant that the WDT would fire if you slept for long enough. In other word, the watchdog timer over count will increase to 750 (24*1000/32) times. The RK3399 HW watchdog interval is 21 seconds. When machine enters the suspend, the watchdog will reset the system after 35.7 (750/21) hours. BUG=chrome-os-partner:59257 TEST=daisydog checked and set value, powerd_dbus_suspend to verify. Change-Id: I88bb2a05b7d67d5ffd292f9d05d033ae9a6a3593 Signed-off-by: Caesar Wang <wxt@rock-chips.com>		2016-11-07 19:57:17 +08:00
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arm	Introduce ARM SiP service	2016-10-12 15:36:45 +01:00
common	Fix comment of plat_reset_handler stub	2016-10-25 01:21:01 +09:00
compat	AArch32: Add essential ARM platform and FVP support	2016-08-10 18:01:38 +01:00
mediatek	Remove MT6795 plat_sip_svc.c to fix Coverity analysis error.	2016-09-19 14:20:42 +08:00
nvidia/tegra	Migrate platform makefile to new console driver location	2016-08-09 17:33:57 +01:00
qemu	Migrate platform makefile to new console driver location	2016-08-09 17:33:57 +01:00
rockchip	rockchip: disable watchdog during suspend	2016-11-07 19:57:17 +08:00
xilinx/zynqmp	zynqmp: Make MMIO write FW call synchronous	2016-09-13 09:19:03 -07:00