A TZC400 controller is placed inline on DRAM channels and regulates the secure and non-secure accesses to both secure and non-secure regions of the DRAM memory. Configure each of the TZC controllers accordingly. Change-Id: I75f6d13591a7fe9e50ce15c793e35a8018041815 Signed-off-by: Suyash Pathak <suyash.pathak@arm.com> |
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fdts | ||
include | ||
platform.mk | ||
rddaniel_err.c | ||
rddaniel_plat.c | ||
rddaniel_security.c | ||
rddaniel_topology.c |