Madhukar Pappireddy 83e955241a Workaround for Hercules erratum 1688305 ... Erratum 1688305 is a Cat B erratum present in r0p0, r0p1 versions of Hercules core. The erratum can be avoided by setting bit 1 of the implementation defined register CPUACTLR2_EL1 to 1 to prevent store- release from being dispatched before it is the oldest. Change-Id: I2ac04f5d9423868b6cdd4ceb3d0ffa46e570efed Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>		2019-12-23 11:21:16 -06:00
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aarch32	Cortex A9:errata 794073 workaround	2019-04-12 10:10:32 +00:00
aarch64	Workaround for Hercules erratum 1688305	2019-12-23 11:21:16 -06:00
cpu-ops.mk	Workaround for Hercules erratum 1688305	2019-12-23 11:21:16 -06:00
errata_report.c	Switch AARCH32/AARCH64 to __aarch64__	2019-08-01 13:45:03 -07:00