Alexei Fedorov f3ccf036ec TF-A AMU extension: fix detection of group 1 counters. ... This patch fixes the bug when AMUv1 group1 counters was always assumed being implemented without checking for its presence which was causing exception otherwise. The AMU extension code was also modified as listed below: - Added detection of AMUv1 for ARMv8.6 - 'PLAT_AMU_GROUP1_NR_COUNTERS' build option is removed and number of group1 counters 'AMU_GROUP1_NR_COUNTERS' is now calculated based on 'AMU_GROUP1_COUNTERS_MASK' value - Added bit fields definitions and access functions for AMCFGR_EL0/AMCFGR and AMCGCR_EL0/AMCGCR registers - Unification of amu.c Aarch64 and Aarch32 source files - Bug fixes and TF-A coding style compliant changes. Change-Id: I14e407be62c3026ebc674ec7045e240ccb71e1fb Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>		2020-08-10 10:40:53 +00:00
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amu	TF-A AMU extension: fix detection of group 1 counters.	2020-08-10 10:40:53 +00:00
mpam	TF-A: Fix wrong register read for MPAM extension	2020-05-26 15:39:52 +00:00
pauth	TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U	2019-10-03 14:43:55 +01:00
ras	Tegra194: add RAS exception handling	2020-06-12 09:43:54 -07:00
spe	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
sve	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00