Varun Wadekar b42192bcbd Tegra210: wait for 512 timer ticks before retention entry ... This patch programs the CPUECTLR_EL1 and L2ECTLR_EL1 registers, so that the core waits for 512 generic timer CNTVALUEB ticks before entering retention state, after executing a WFI instruction. This functionality is configurable and can be enabled for platforms by setting the newly defined 'ENABLE_L2_DYNAMIC_RETENTION' and 'ENABLE_CPU_DYNAMIC_RETENTION' flag. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2015-08-24 21:34:28 +05:30
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t132	Tegra132: set TZDRAM_BASE to 0xF5C00000	2015-07-31 10:26:22 +05:30
t210	Tegra210: wait for 512 timer ticks before retention entry	2015-08-24 21:34:28 +05:30