Soby Mathew 12d554f941 Rationalize UART usage among different BL stages ... This patch changes the UART port assignment for various BL stages so as to make it consistent on the platform ports. The BL1, BL2 and BL3-1 now uses UART0 on the FVP port and SoC UART0 on the Juno port. The BL3-2 uses UART2 on the FVP port and FPGA UART0 on the Juno port. This provides an interim fix to ARM-software/tf-issues#220 until support is added for changing the UART port for a BL image between cold boot and runtime. Change-Id: Iae5faea90be3d59e41e597b34a902f93e737505a		2014-08-21 16:30:25 +01:00
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aarch64	Add CPU specific power management operations	2014-08-20 19:14:31 +01:00
drivers/pwrc	Remove calling CPU mpidr from bakery lock API	2014-06-23 23:16:39 +01:00
include	Rework use of labels in assembly macros.	2014-08-19 14:42:35 +01:00
tsp	Rationalize UART usage among different BL stages	2014-08-21 16:30:25 +01:00
bl1_fvp_setup.c	Remove platform dependency in CCI-400 driver	2014-08-14 10:49:20 +01:00
bl2_fvp_setup.c	FVP: make usage of Trusted DRAM optional at build time	2014-08-14 09:32:48 +01:00
bl31_fvp_setup.c	Remove platform dependency in CCI-400 driver	2014-08-14 10:49:20 +01:00
fvp_def.h	Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs	2014-08-19 11:42:45 +01:00
fvp_io_storage.c	Remove redundant io_init() function	2014-08-14 11:16:15 +01:00
fvp_pm.c	Add CPU specific power management operations	2014-08-20 19:14:31 +01:00
fvp_private.h	Remove platform dependency in CCI-400 driver	2014-08-14 10:49:20 +01:00
fvp_security.c	Simplify interface to TZC-400 driver	2014-08-14 11:17:52 +01:00
fvp_topology.c	Remove all checkpatch errors from codebase	2014-06-24 12:50:00 +01:00
platform.mk	Introduce framework for CPU specific operations	2014-08-20 19:13:25 +01:00