BenjaminLimJL f65bdf3a54 feat(intel): implement timer init divider via cpu frequency. (#1) ... Get cpu frequency and update the timer init div with it. The timer is vary based on the cpu frequency instead of hardcoded. The implementation shall apply to only Agilex and S10 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422		2022-05-06 17:37:45 +02:00
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agilex_clock_manager.h	feat(intel): implement timer init divider via cpu frequency. (#1)	2022-05-06 17:37:45 +02:00
agilex_memory_controller.h	intel: Enable bridge access in Intel platform	2020-01-16 10:53:21 +08:00
agilex_mmc.h	plat: intel: set DRVSEL and SMPLSEL for DWMMC	2020-06-08 22:03:34 +00:00
agilex_noc.h	fix(intel): refactor NOC header	2022-04-28 19:07:55 +08:00
agilex_pinmux.h	intel: Refactor common platform code [1/5]	2019-11-28 12:47:57 +08:00
socfpga_plat_def.h	feat(intel): implement timer init divider via cpu frequency. (#1)	2022-05-06 17:37:45 +02:00