Bipin Ravi 7e3273e8e4 fix(errata): workaround for DSU-110 erratum 2313941 ... DSU-110 erratum 2313941 is a Cat B erratum and applies to revisions r0p0, r1p0, r2p0, r2p1, r3p0, r3p1 and is still open. The workaround sets IMP_CLUSTERACTLR_EL1[16:15] bits to 0b11 to disable clock gating of the SCLK domain. This will increase the idle power consumption. This patch applies the fix for Cortex-X2/A510/A710 and Neoverse N2. SDEN can be found here: https://developer.arm.com/documentation/SDEN1781796/latest Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I54d948b23e8e01aaf1898ed9fe4e2255dd209318 Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>		2022-05-11 19:05:36 +02:00
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aarch32	Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__	2019-08-01 13:14:12 -07:00
aarch64	fix(errata): workaround for DSU-110 erratum 2313941	2022-05-11 19:05:36 +02:00
errata_report.h	Workaround for Cortex A78 erratum 1951500	2021-01-13 13:54:18 -06:00
wa_cve_2017_5715.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2018_3639.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2022_23960.h	fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57	2022-03-18 01:01:34 +02:00