arm-trusted-firmware/docs
Sandrine Bailleux 5d1c104f9a Introduce SEPARATE_CODE_AND_RODATA build flag
At the moment, all BL images share a similar memory layout: they start
with their code section, followed by their read-only data section.
The two sections are contiguous in memory. Therefore, the end of the
code section and the beginning of the read-only data one might share
a memory page. This forces both to be mapped with the same memory
attributes. As the code needs to be executable, this means that the
read-only data stored on the same memory page as the code are
executable as well. This could potentially be exploited as part of
a security attack.

This patch introduces a new build flag called
SEPARATE_CODE_AND_RODATA, which isolates the code and read-only data
on separate memory pages. This in turn allows independent control of
the access permissions for the code and read-only data.

This has an impact on memory footprint, as padding bytes need to be
introduced between the code and read-only data to ensure the
segragation of the two. To limit the memory cost, the memory layout
of the read-only section has been changed in this case.

 - When SEPARATE_CODE_AND_RODATA=0, the layout is unchanged, i.e.
   the read-only section still looks like this (padding omitted):

   |        ...        |
   +-------------------+
   | Exception vectors |
   +-------------------+
   |  Read-only data   |
   +-------------------+
   |       Code        |
   +-------------------+ BLx_BASE

   In this case, the linker script provides the limits of the whole
   read-only section.

 - When SEPARATE_CODE_AND_RODATA=1, the exception vectors and
   read-only data are swapped, such that the code and exception
   vectors are contiguous, followed by the read-only data. This
   gives the following new layout (padding omitted):

   |        ...        |
   +-------------------+
   |  Read-only data   |
   +-------------------+
   | Exception vectors |
   +-------------------+
   |       Code        |
   +-------------------+ BLx_BASE

   In this case, the linker script now exports 2 sets of addresses
   instead: the limits of the code and the limits of the read-only
   data. Refer to the Firmware Design guide for more details. This
   provides platform code with a finer-grained view of the image
   layout and allows it to map these 2 regions with the appropriate
   access permissions.

Note that SEPARATE_CODE_AND_RODATA applies to all BL images.

Change-Id: I936cf80164f6b66b6ad52b8edacadc532c935a49
2016-07-08 14:55:11 +01:00
..
diagrams Initialize secondary CPUs during cold boot 2016-03-07 09:23:38 +00:00
plat Merge pull request #651 from Xilinx/zynqmp_uart 2016-07-04 18:05:15 +01:00
spd Tegra: retrieve BL32's bootargs from bl32_ep_info 2015-07-31 10:26:22 +05:30
auth-framework.md Remove dashes from image names: 'BL3-x' --> 'BL3x' 2015-12-14 12:31:37 +00:00
change-log.md Update `change-log.md` for v1.2 release 2015-12-21 18:17:12 +00:00
cpu-specific-build-macros.md Doc: Add links to the A53/A57 Errata Notice documents 2016-04-21 13:00:28 +01:00
firmware-design.md Introduce SEPARATE_CODE_AND_RODATA build flag 2016-07-08 14:55:11 +01:00
firmware-update.md Documentation: Fix broken links in ToCs 2016-01-12 11:19:39 +00:00
interrupt-framework-design.md Documentation: Fix broken links in ToCs 2016-01-12 11:19:39 +00:00
platform-migration-guide.md Remove dashes from image names: 'BL3-x' --> 'BL3x' 2015-12-14 12:31:37 +00:00
porting-guide.md Add optional PSCI STAT residency & count functions 2016-06-16 08:55:00 +01:00
psci-pd-tree.md PSCI: Introduce new platform interface to describe topology 2015-08-13 16:28:26 +01:00
reset-design.md Introduce the ARM TF reset design document 2015-12-15 15:14:43 +00:00
rt-svc-writers-guide.md Miscellaneous doc fixes for v1.2 2015-12-21 18:10:12 +00:00
trusted-board-boot.md FWU: Add documentation for Firmware Update feature 2015-12-17 16:39:37 +00:00
user-guide.md Add optional PSCI STAT residency & count functions 2016-06-16 08:55:00 +01:00