Soby Mathew 663db206f8 Derive stack alignment from CACHE_WRITEBACK_GRANULE ... The per-cpu stacks should be aligned to the cache-line size and the `declare_stack` helper in asm_macros.S macro assumed a cache-line size of 64 bytes. The platform defines the cache-line size via CACHE_WRITEBACK_GRANULE macro. This patch modifies `declare_stack` helper macro to derive stack alignment from the platform defined macro. Change-Id: I1e1b00fc8806ecc88190ed169f4c8d3dd25fe95b		2016-07-08 09:58:10 +01:00
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plat_common.c	Add 32 bit version of plat_get_syscnt_freq	2016-05-20 15:29:03 +01:00
plat_psci_common.c	PSCI: Add framework to handle composite power states	2015-08-13 19:57:31 +01:00
platform_helpers.S	Remove all non-configurable dead loops	2016-03-14 16:41:18 +00:00
platform_mp_stack.S	Derive stack alignment from CACHE_WRITEBACK_GRANULE	2016-07-08 09:58:10 +01:00
platform_up_stack.S	Derive stack alignment from CACHE_WRITEBACK_GRANULE	2016-07-08 09:58:10 +01:00