Soby Mathew 55cf015c20 FVP: Change BL31_BASE when RESET_TO_BL31=1 ... This patch defines BL31_BASE to 0x0 when RESET_TO_BL31=1 as the executable is built with PIE support and can be loaded anywhere in SRAM for execution. Change-Id: I4007f4626322f1200a6304c9c565987d3357986c Signed-off-by: Soby Mathew <soby.mathew@arm.com>		2018-12-17 15:25:49 +00:00
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board/common	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
common	FVP: Change BL31_BASE when RESET_TO_BL31=1	2018-12-17 15:25:49 +00:00
css/common	plat/css: allow platforms to define the system power domain level	2018-11-27 10:32:55 +05:30
soc/common	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00