Yatharth Kochar 6083c841d0 GICv3: Allow either G1S or G0 interrupts to be configured ... Currently the GICv3 driver mandates that platform populate both G1S and G0 interrupts. However, it is possible that a given platform is not interested in both the groups and just needs to specify either one of them. This patch modifies the `gicv3_rdistif_init()` & `gicv3_distif_init()` functions to allow either G1S or G0 interrupts to be configured. Fixes ARM-software/tf-issues#400 Change-Id: I43572b0e08ae30bed5af9334f25d35bf439b0d2b		2016-09-12 16:19:08 +01:00
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cci	Use uintptr_t as base address type in ARM driver APIs	2015-07-09 11:53:32 +01:00
cci400	Fix debug assertion in deprecated CCI-400 driver	2015-10-12 10:21:55 +01:00
ccn	Rework type usage in Trusted Firmware	2016-07-18 17:52:15 +01:00
gic	GICv3: Allow either G1S or G0 interrupts to be configured	2016-09-12 16:19:08 +01:00
pl011	AArch32: Add console driver	2016-08-10 12:35:46 +01:00
pl061	arm: gpio: add pl061 driver	2016-02-12 23:19:48 +08:00
sp804	Add SP804 delay timer driver	2015-06-18 16:06:26 +01:00
sp805	Add a simple ARM SP805 watchdog driver	2015-11-27 09:34:20 +00:00
tzc	AArch32: Enable GIC and TZC support	2016-08-10 12:35:46 +01:00
tzc400	Refactor the ARM CoreLink TZC-400 driver	2016-03-31 21:23:23 +01:00