Derek Basehore ad84ad49b3 rockchip: rk3399: Enable per CS training at 666MHz ... This enables per CS training at 666MHz and above for ddrfreq per vendor recommendation. Since the threshold was used for latency was the same value, this also adds a new value for that. Signed-off-by: Derek Basehore <dbasehore@chromium.org>		2017-02-24 20:07:44 +08:00
..
dfs.c	rockchip: rk3399: Enable per CS training at 666MHz	2017-02-24 20:07:44 +08:00
dfs.h	rockchip: rk3399: add support for ddrfreq suspend/resume	2017-02-24 20:07:44 +08:00
dram.c	rockchip: Break out common dram code for rk3399	2016-10-27 01:50:57 +08:00
dram.h	rockchip: Break out common dram code for rk3399	2016-10-27 01:50:57 +08:00
dram_spec_timing.c	rockchip: rk3399: dram: remove dram_init and dts_timing_receive function	2017-02-24 15:43:47 +08:00
dram_spec_timing.h	rockchip: Break out common dram code for rk3399	2016-10-27 01:50:57 +08:00
suspend.c	rockchip: rk3399: add support for ddrfreq suspend/resume	2017-02-24 20:07:44 +08:00
suspend.h	rockchip: add support save/restore configuration for DDR during enter S3	2016-10-27 07:14:26 +08:00