arm-trusted-firmware/plat
Khandelwal c6fe43b726 Corstone700: add support for mhuv2 in arm TF-A
Note: This patch implements in-band messaging protocol only.
ARM has launched a next version of MHU i.e. MHUv2 with its latest
subsystems. The main change is that the MHUv2 is now a distributed IP
with different peripheral views (registers) for the sender and receiver.

Another main difference is that MHUv1 duplex channels are now split into
simplex/half duplex in MHUv2. MHUv2 has a configurable number of
communication channels. There is a capability register (MSG_NO_CAP) to
find out how many channels are available in a system.

The register offsets have also changed for STAT, SET & CLEAR registers
from 0x0, 0x8 & 0x10 in MHUv1 to 0x0, 0xC & 0x8 in MHUv2 respectively.

0x0    0x4  0x8  0xC             0x1F
------------------------....-----
| STAT |    |    | SET |    |   |
------------------------....-----
      Transmit Channel

0x0    0x4  0x8   0xC            0x1F
------------------------....-----
| STAT |    | CLR |    |    |   |
------------------------....-----
        Receive Channel

The MHU controller can request the receiver to wake-up and once the
request is removed, the receiver may go back to sleep, but the MHU
itself does not actively put a receiver to sleep.

So, in order to wake-up the receiver when the sender wants to send data,
the sender has to set ACCESS_REQUEST register first in order to wake-up
receiver, state of which can be detected using ACCESS_READY register.
ACCESS_REQUEST has an offset of 0xF88 & ACCESS_READY has an offset
of 0xF8C and are accessible only on any sender channel.

This patch adds necessary changes in a new file required to support the
latest MHUv2 controller. This patch also needs an update in DT binding
for ARM MHUv2 as we need a second register base (tx base) which would
be used as the send channel base.

Change-Id: I1455e08b3d88671a191c558790c503eabe07a8e6
Signed-off-by: Tushar Khandelwal <tushar.khandelwal@arm.com>
2020-02-17 16:13:38 +00:00
..
allwinner allwinner: Unify Platform specific defines for PSCI module 2020-01-24 13:14:34 +00:00
amlogic amlogic: axg: Add a build flag when using ATOS as BL32 2020-02-06 12:10:47 +01:00
arm Corstone700: add support for mhuv2 in arm TF-A 2020-02-17 16:13:38 +00:00
common SPMD: add support for an example SPM core manifest 2020-02-10 14:09:10 +00:00
hisilicon hisilicon: Unify Platform specific defines for PSCI module 2020-01-24 13:01:27 +00:00
imx Enable -Wredundant-decls warning check 2020-01-28 11:09:02 -06:00
intel/soc Merge "intel: Change boot source selection" into integration 2020-02-12 15:54:02 +00:00
layerscape layerscape: Unify Platform specific defines for PSCI module 2020-01-24 13:15:40 +00:00
marvell plat: marvell: armada: scp_bl2: allow loading up to 8 images 2020-01-30 23:13:07 +01:00
mediatek Use correct type when reading SCR register 2020-01-28 11:10:48 +00:00
nvidia/tegra Tegra194: mce: declare nvg_roc_clean_cache_trbits() 2020-02-05 19:15:40 +00:00
qemu qemu: define ARMV7_SUPPORTS_VFP 2020-02-07 12:19:34 +01:00
renesas/rcar Merge "Use correct type when reading SCR register" into integration 2020-01-30 16:55:55 +00:00
rockchip Use correct type when reading SCR register 2020-01-28 11:10:48 +00:00
rpi Merge "rpi3/4: Add support for offlining CPUs" into integration 2020-01-20 22:16:43 +00:00
socionext Merge changes from topic "uniphier" into integration 2020-02-14 08:26:05 +00:00
st Enable -Wredundant-decls warning check 2020-01-28 11:09:02 -06:00
ti/k3 Merge "Use correct type when reading SCR register" into integration 2020-01-30 16:55:55 +00:00
xilinx xilinx: versal: Pass result count to pm_get_callbackdata() 2020-01-30 11:31:52 -08:00