Manish V Badarkhe cb55615c50 el3_runtime: Rearrange context offset of EL1 sys registers ... SCTLR and TCR registers of EL1 plays role in enabling/disabling of page table walk for lower ELs (EL0 and EL1). Hence re-arranged EL1 context offsets to have SCTLR and TCR registers values one after another in the stack so that these registers values can be saved and restored using stp and ldp instruction respectively. Change-Id: Iaa28fd9eba82a60932b6b6d85ec8857a9acd5f8b Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>		2020-08-18 10:49:27 +01:00
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arch	TF-A AMU extension: fix detection of group 1 counters.	2020-08-10 10:40:53 +00:00
bl1	Specify signed-ness of constants	2020-08-14 11:36:05 +00:00
bl2	BL2_AT_EL3: Enable pointer authentication support	2019-02-27 11:58:09 +00:00
bl2u	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
bl31	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00
bl32	spd: tlkd: support new TLK SMCs for RPMB service	2020-03-21 19:00:05 -07:00
common	dualroot: add chain of trust for Platform owned SPs	2020-08-12 14:30:31 +01:00
drivers	dualroot: add chain of trust for Platform owned SPs	2020-08-12 14:30:31 +01:00
dt-bindings	dts: bindings: stm32mp1: define SCMI clock and reset domain IDs	2020-07-16 17:35:19 +02:00
export	tbbr/dualroot: Add fw_config image in chain of trust	2020-06-24 08:44:26 +01:00
lib	el3_runtime: Rearrange context offset of EL1 sys registers	2020-08-18 10:49:27 +01:00
plat	Merge changes from topic "sp_dual_signing" into integration	2020-08-14 15:58:04 +00:00
services	FFA Version interface update	2020-06-23 15:08:48 +01:00
tools_share	cert_create: add Platform owned secure partitions support	2020-08-12 14:30:18 +01:00