Carlo Caione cdb8c52f92 amlogic: g12a: Add support for the S905X2 (G12A) platform ... Introduce the preliminary support for the Amlogic S905X2 (G12A) SoC. This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux. Tested on a SEI510 board. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ife958f10e815a4530292c45446adb71239f3367f		2019-09-26 09:27:45 +01:00
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components	Romlib makefile refactoring and script rewriting	2019-07-22 18:07:57 +02:00
design	Add documentation for new KEY_SIZE option	2019-09-12 15:27:41 +01:00
getting_started	Merge "Refactor ARMv8.3 Pointer Authentication support code" into integration	2019-09-13 15:22:23 +00:00
perf	Remove references to old project name from common files	2019-07-10 11:13:00 +01:00
plat	amlogic: g12a: Add support for the S905X2 (G12A) platform	2019-09-26 09:27:45 +01:00
process	Merge "Fix RST rendering problem" into integration	2019-07-12 07:35:28 +00:00
resources	doc: Complete the storage abstraction layer doc	2019-07-18 09:22:29 +01:00
security_advisories	Update security documentation	2019-05-24 12:58:55 +01:00
Makefile	doc: Add minimal Sphinx support	2019-05-21 12:31:25 +01:00
acknowledgements.rst	doc: Refactor contributor acknowledgements	2019-05-22 11:28:17 +01:00
change-log.rst	Remove references to old project name from common files	2019-07-10 11:13:00 +01:00
conf.py	doc: Generate PlantUML diagrams automatically	2019-07-12 14:15:25 +01:00
contents.rst	Docs fixes	2019-05-24 12:59:05 +01:00
global_substitutions.txt	Added SPCI to the glossary	2019-08-29 14:30:54 +01:00
glossary.rst	Added SPCI to the glossary	2019-08-29 14:30:54 +01:00
index.rst	Rename Cortex-Deimos to Cortex-A77	2019-07-10 12:14:20 +02:00
license.rst	doc: Move content out of readme and create new index page	2019-05-21 15:05:58 +01:00
maintainers.rst	amlogic: g12a: Add support for the S905X2 (G12A) platform	2019-09-26 09:27:45 +01:00
requirements.txt	doc: Generate PlantUML diagrams automatically	2019-07-12 14:15:25 +01:00