Varun Wadekar cf3ed0dcc7 cpus: denver: reset power state to 'C1' on boot ... Denver CPUs expect the power state field to be reset to 'C1' during boot. This patch updates the reset handler to reset the ACTLR_.PMSTATE field to 'C1' state during CPU boot. Change-Id: I7cb629627a4dd1a30ec5cbb3a5e90055244fe30c Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2018-09-04 17:33:56 -07:00
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bl1	Fix MISRA rule 8.4 Part 1	2018-02-28 17:19:55 +00:00
bl2	Fix MISRA rule 8.5 in common code	2018-04-13 14:01:56 +01:00
bl2u	Fix MISRA rule 8.4 in common code	2018-02-28 17:18:46 +00:00
bl31	Fix MISRA defects in BL31 common code	2018-08-30 09:22:33 +01:00
bl32	Introduce the new BL handover interface	2018-02-26 16:31:10 +00:00
common	Fix MISRA defects in log helpers	2018-08-30 16:22:52 +01:00
drivers	Merge pull request #1540 from MISL-EBU-System-SW/marvell-updates-18.09	2018-09-04 03:35:54 +01:00
dt-bindings	stm32mp1: Add device tree files	2018-07-24 17:18:35 +02:00
lib	cpus: denver: reset power state to 'C1' on boot	2018-09-04 17:33:56 -07:00
plat	Merge pull request #1540 from MISL-EBU-System-SW/marvell-updates-18.09	2018-09-04 03:35:54 +01:00
services	libc: Fix all includes in codebase	2018-08-22 10:26:05 +01:00
tools_share	Make TF UUID RFC 4122 compliant	2018-06-14 14:41:00 +01:00