arm-trusted-firmware/plat
Alexei Fedorov 6227cca9e8 FVP: Fix BL31 load address and image size for RESET_TO_BL31=1
When TF-A is built with RESET_TO_BL31=1 option, BL31 is the
first image to be run and should have all the memory allocated
to it except for the memory reserved for Shared RAM at the start
of Trusted SRAM.
This patch fixes FVP BL31 load address and its image size for
RESET_TO_BL31=1 option. BL31 startup address should be set to
0x400_1000 and its maximum image size to the size of Trusted SRAM
minus the first 4KB of shared memory.
Loading BL31 at 0x0402_0000 as it is currently stated in
'\docs\plat\arm\fvp\index.rst' causes EL3 exception when the
image size gets increased (i.e. building with LOG_LEVEL=50)
but doesn't exceed 0x3B000 not causing build error.

Change-Id: Ie450baaf247f1577112f8d143b24e76c39d33e91
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-02-18 10:16:51 +00:00
..
allwinner allwinner: Unify Platform specific defines for PSCI module 2020-01-24 13:14:34 +00:00
amlogic amlogic: axg: Add a build flag when using ATOS as BL32 2020-02-06 12:10:47 +01:00
arm FVP: Fix BL31 load address and image size for RESET_TO_BL31=1 2020-02-18 10:16:51 +00:00
common SPMD: add support for an example SPM core manifest 2020-02-10 14:09:10 +00:00
hisilicon hisilicon: Unify Platform specific defines for PSCI module 2020-01-24 13:01:27 +00:00
imx Enable -Wredundant-decls warning check 2020-01-28 11:09:02 -06:00
intel/soc Merge "intel: Change boot source selection" into integration 2020-02-12 15:54:02 +00:00
layerscape layerscape: Unify Platform specific defines for PSCI module 2020-01-24 13:15:40 +00:00
marvell plat: marvell: armada: scp_bl2: allow loading up to 8 images 2020-01-30 23:13:07 +01:00
mediatek Use correct type when reading SCR register 2020-01-28 11:10:48 +00:00
nvidia/tegra Tegra194: mce: declare nvg_roc_clean_cache_trbits() 2020-02-05 19:15:40 +00:00
qemu qemu: define ARMV7_SUPPORTS_VFP 2020-02-07 12:19:34 +01:00
renesas/rcar Merge "Use correct type when reading SCR register" into integration 2020-01-30 16:55:55 +00:00
rockchip Use correct type when reading SCR register 2020-01-28 11:10:48 +00:00
rpi Merge "rpi3/4: Add support for offlining CPUs" into integration 2020-01-20 22:16:43 +00:00
socionext Merge changes from topic "uniphier" into integration 2020-02-14 08:26:05 +00:00
st Enable -Wredundant-decls warning check 2020-01-28 11:09:02 -06:00
ti/k3 Merge "Use correct type when reading SCR register" into integration 2020-01-30 16:55:55 +00:00
xilinx xilinx: versal: Pass result count to pm_get_callbackdata() 2020-01-30 11:31:52 -08:00