d45a1c303e
The security properties of some IP blocks are configured to secure mode after reset. This means these IP blocks can only be accessed by cpus in secure state by default. These should be configured correclty as needed. Signed-off-by: y00241285 <yyangwei.yangwei@hisilicon.com> Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> |
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| .. | ||
| arm | ||
| common | ||
| compat | ||
| hisilicon | ||
| mediatek | ||
| nvidia/tegra | ||
| qemu | ||
| rockchip | ||
| rpi3 | ||
| socionext/uniphier | ||
| xilinx/zynqmp | ||