5b886432dc
To catch early hangs in resume, this sets up the watchdog before anything else in the pmusram code (ignoring setting up the stack...). This uses hard coded settings for the watchdog until the proper watchdog restore later on in the firmware/kernel. This also restores the old watchdog register values before the PLLs are restored to make sure we don't temporarily switch over to a 1/3s timeout on the watchdog when the pclk_wdt goes from 4MHz to 100MHz. Change-Id: I8f7652089a88783271b17482117b4609330abe80 Signed-off-by: Derek Basehore <dbasehore@chromium.org> |
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| .. | ||
| drivers | ||
| include | ||
| plat_sip_calls.c | ||
| platform.mk | ||
| rk3399_def.h | ||