Dimitris Papastamos d9bd656cf5 Optimize/cleanup BPIALL workaround ... In the initial implementation of this workaround we used a dedicated workaround context to save/restore state. This patch reduces the footprint as no additional context is needed. Additionally, this patch reduces the memory loads and stores by 20%, reduces the instruction count and exploits static branch prediction to optimize the SMC path. Change-Id: Ia9f6bf06fbf8a9037cfe7f1f1fb32e8aec38ec7d Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>		2018-01-29 09:58:57 +00:00
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aem_generic.S	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
cortex_a35.S	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
cortex_a53.S	CPU: Correct names of implementation-defined aux regs	2017-08-29 13:52:48 +01:00
cortex_a55.S	Fix order of #includes	2017-07-12 14:45:31 +01:00
cortex_a57.S	Print erratum application report for CVE-2017-5715	2018-01-18 10:36:10 +00:00
cortex_a72.S	Print erratum application report for CVE-2017-5715	2018-01-18 10:36:10 +00:00
cortex_a73.S	Print erratum application report for CVE-2017-5715	2018-01-18 10:36:10 +00:00
cortex_a75.S	Print erratum application report for CVE-2017-5715	2018-01-18 10:36:10 +00:00
cortex_a75_pubsub.c	Add hooks to save/restore AMU context for Cortex A75	2018-01-11 14:37:20 +00:00
cpu_helpers.S	bl2-el3: Add BL2_EL3 image	2018-01-18 09:42:35 +00:00
denver.S	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
workaround_cve_2017_5715_bpiall.S	Optimize/cleanup BPIALL workaround	2018-01-29 09:58:57 +00:00
workaround_cve_2017_5715_mmu.S	Workaround for CVE-2017-5715 on Cortex A57 and A72	2018-01-11 10:26:15 +00:00