arm-trusted-firmware/plat/st/stm32mp1
Yann Gautier 941ba04396 stm32mp1: remove useless compilation flags
On AARCH32, thumb is used by default, no need to redefine it.
As all our binaries are compiled with thumb, interwork is not needed.
The binaries compiled with or without those flags are the same,
except of course for the date.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-12-13 15:01:53 +01:00
..
include Standardise header guards across codebase 2018-11-08 10:20:19 +00:00
sp_min stm32mp1: use MULTI_CONSOLE_API 2018-11-15 11:30:01 +01:00
bl2_io_storage.c stm32mp: check stm32_sdmmc2_mmc_init return 2018-12-04 10:38:41 +01:00
bl2_plat_setup.c stm32mp1: use MULTI_CONSOLE_API 2018-11-15 11:30:01 +01:00
plat_bl2_mem_params_desc.c Introduce STMicroelectronics STM32MP1 platform 2018-07-24 17:11:43 +02:00
plat_image_load.c stm32mp1: correct some static analysis tools issues 2018-11-09 18:22:08 +01:00
platform.mk stm32mp1: remove useless compilation flags 2018-12-13 15:01:53 +01:00
stm32mp1.S stm32mp1: Link BL2, BL32 and DTB in one binary 2018-07-24 17:18:41 +02:00
stm32mp1.ld.S Standardise header guards across codebase 2018-11-08 10:20:19 +00:00
stm32mp1_common.c layerscape: stm32mp1: Migrate to enable_mmu_svc_mon() 2018-08-10 13:47:37 +01:00
stm32mp1_context.c stm32mp1: save boot information in backup registers 2018-07-24 17:14:22 +02:00
stm32mp1_def.h stm32mp1: add sdmmc2 driver 2018-10-15 09:36:04 +02:00
stm32mp1_dt.c stm32mp1: Add DDR support and its security with TZC400 2018-07-24 17:18:19 +02:00
stm32mp1_gic.c stm32mp1: Add BL32 SP_min secure monitor 2018-07-24 17:18:32 +02:00
stm32mp1_helper.S stm32mp1: use MULTI_CONSOLE_API 2018-11-15 11:30:01 +01:00
stm32mp1_pm.c stm32mp1: Add BL32 SP_min secure monitor 2018-07-24 17:18:32 +02:00
stm32mp1_security.c stm32mp1: Add BL32 SP_min secure monitor 2018-07-24 17:18:32 +02:00
stm32mp1_stack_protector.c Introduce STMicroelectronics STM32MP1 platform 2018-07-24 17:11:43 +02:00
stm32mp1_topology.c stm32mp1: Add BL32 SP_min secure monitor 2018-07-24 17:18:32 +02:00