johpow01 62bbfe82c8 Workaround for Cortex A77 erratum 1800714 ... Cortex A77 erratum 1800714 is a Cat B erratum, present in older revisions of the Cortex A77 processor core. The workaround is to set a bit in the ECTLR_EL1 system register, which disables allocation of splintered pages in the L2 TLB. Since this is the first errata workaround implemented for Cortex A77, this patch also adds the required cortex_a77_reset_func in the file lib/cpus/aarch64/cortex_a77.S. This errata is explained in this SDEN: https://static.docs.arm.com/101992/0010/Arm_Cortex_A77_MP074_Software_Developer_Errata_Notice_v10.pdf Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I844de34ee1bd0268f80794e2d9542de2f30fd3ad		2020-06-25 14:50:58 +00:00
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aem_generic.S	FVP_Base_AEMv8A platform: Fix cache maintenance operations	2019-08-16 11:30:37 +00:00
cortex_a35.S	Cortex-A35: Implement workaround for errata 855472	2019-04-17 13:46:43 +01:00
cortex_a53.S	ti: k3: common: Remove coherency workaround for AM65x	2019-06-06 11:20:26 +01:00
cortex_a55.S	Cortex-A55: workarounds for errata 1221012	2019-05-28 14:19:04 +01:00
cortex_a57.S	cpus: higher performance non-cacheable load forwarding	2020-02-20 09:25:45 -08:00
cortex_a65.S	Introducing support for Cortex-A65	2019-10-02 18:12:28 +02:00
cortex_a65ae.S	Introducing support for Cortex-A65AE	2019-10-03 15:38:31 +02:00
cortex_a72.S	cpulib: Add ISBs or comment why they are unneeded	2018-06-19 10:34:51 +01:00
cortex_a73.S	Cortex-A73: Implement workaround for errata 852427	2019-02-28 12:01:13 +00:00
cortex_a75.S	Add compile-time errors for HW_ASSISTED_COHERENCY flag	2019-05-03 14:23:55 +01:00
cortex_a75_pubsub.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
cortex_a76.S	Workaround for Cortex A76 erratum 1800710	2020-06-22 17:47:54 -05:00
cortex_a76ae.S	Apply compile-time check for AArch64-only cores	2019-06-04 14:08:55 +01:00
cortex_a77.S	Workaround for Cortex A77 erratum 1800714	2020-06-25 14:50:58 +00:00
cortex_a78.S	Rename Cortex-Hercules to Cortex-A78	2020-06-01 17:33:22 -05:00
cortex_hercules_ae.S	Rename Cortex-Hercules to Cortex-A78	2020-06-01 17:33:22 -05:00
cortex_klein.S	Add CPULib for Klein Core	2020-02-18 08:57:32 -06:00
cortex_matterhorn.S	Add Matterhorn CPU lib	2020-02-18 09:00:04 -06:00
cpu_helpers.S	Neoverse N1 Errata Workaround 1542419	2019-10-04 19:31:24 +03:00
cpuamu.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
cpuamu_helpers.S	Add support for Branch Target Identification	2019-05-24 14:44:45 +01:00
denver.S	cpus: denver: disable cycle counter when event counting is prohibited	2020-06-09 19:54:29 +00:00
dsu_helpers.S	DSU: Implement workaround for errata 798953	2019-04-17 13:46:43 +01:00
neoverse_e1.S	DSU: Apply erratum 936184 for Neoverse N1/E1	2019-06-11 14:01:32 +01:00
neoverse_n1.S	Neovers N1: added support to update presence of External LLC	2020-01-27 14:44:35 +00:00
neoverse_n1_pubsub.c	Rename Cortex-Ares to Neoverse N1	2019-02-19 13:50:07 +00:00
neoverse_zeus.S	Zeus: apply the MSR SSBS instruction	2019-09-11 14:37:42 +01:00
wa_cve_2017_5715_bpiall.S	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
wa_cve_2017_5715_mmu.S	Prevent speculative execution past ERET	2020-01-22 21:42:51 +00:00