Jeetesh Burman 4eed9c8480 Tegra186: add SE support to generate SHA256 of TZRAM ... The BL3-1 firmware code is stored in TZSRAM on Tegra186 platforms. This memory loses power when we enter System Suspend and so its contents are stored to TZDRAM, before entry. This opens up an attack vector where the TZDRAM contents might be tampered with when we are in the System Suspend mode. To mitigate this attack the SE engine calculates the hash of entire TZSRAM and stores it in PMC scratch, before we copy data to TZDRAM. The WB0 code will validate the TZDRAM and match the hash with the one in PMC scratch. This patch adds driver for the SE engine, with APIs to calculate the hash and store SE SHA256 hash-result to PMC scratch registers. Change-Id: Ib487d5629225d3d99bd35d44f0402d6d3cf27ddf Signed-off-by: Jeetesh Burman <jburman@nvidia.com>		2020-03-09 15:25:16 -07:00
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drivers	Tegra186: add SE support to generate SHA256 of TZRAM	2020-03-09 15:25:16 -07:00
lib	Tegra: include: fix violations of MISRA Rule 21.1	2020-01-12 14:44:40 -08:00
t132	Tegra: per-SoC DRAM base values	2020-01-31 13:19:08 -08:00
t186	Tegra186: add SE support to generate SHA256 of TZRAM	2020-03-09 15:25:16 -07:00
t194	Tegra: per-SoC DRAM base values	2020-01-31 13:19:08 -08:00
t210	Tegra210: SE: add context save support	2020-03-09 15:25:15 -07:00
plat_macros.S	Makefile: remove extra include paths in INCLUDES	2019-04-03 15:30:46 +01:00
platform_def.h	Tegra: dummy support for the io_storage backend	2019-03-01 10:22:54 -08:00
tegra_platform.h	Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__	2019-08-01 13:14:12 -07:00
tegra_private.h	Tegra: handler to check support for System Suspend	2020-02-20 09:25:45 -08:00