Louis Mayencourt f1be00da0b Use correct type when reading SCR register ... The Secure Configuration Register is 64-bits in AArch64 and 32-bits in AArch32. Use u_register_t instead of unsigned int to reflect this. Change-Id: I51b69467baba36bf0cfaec2595dc8837b1566934 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>		2020-01-28 11:10:48 +00:00
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aarch64	mediatek: mt8173: apply MULTI_CONSOLE framework	2019-09-12 09:16:12 -07:00
drivers	Remove redundant declarations.	2020-01-08 18:00:25 -06:00
include	mediatek: Unify Platform specific defines for PSCI module	2020-01-24 13:15:19 +00:00
bl31_plat_setup.c	mediatek: mt8173: apply MULTI_CONSOLE framework	2019-09-12 09:16:12 -07:00
plat_mt_gic.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
plat_pm.c	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00
plat_sip_calls.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
plat_topology.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
platform.mk	mediatek: mt8173: refactor RTC and PMIC drivers	2019-09-16 10:27:21 +08:00
power_tracer.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
scu.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00