arm-trusted-firmware/plat/rockchip
Heiko Stuebner f55ef85ebf rockchip: px30: cleanup securing of ddr regions
So far the px30-related ddr security was loading data for regions to secure
from a pre-specified memory location and also setting region0 to secure
the first megabyte of memory in hard-coded setting (top=0, end=0, meaning
1MB).

To make things more explicit and easier to read add a function doing
the settings for specified memory areas, like other socs have and also
add an assert to make sure any descriptor read from memory does not
overlap the TZRAM security in region0 and TEE security in region1.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Change-Id: I78441875112bf66a62fde5f1789f4e52a78ef95f
2019-12-17 10:18:50 +01:00
..
common plat/rockchip: initialize reset and poweroff GPIOs with known invalid value 2019-11-17 12:38:24 -08:00
px30 rockchip: px30: cleanup securing of ddr regions 2019-12-17 10:18:50 +01:00
rk3288 rockchip: really use base+size for secure ddr regions 2019-12-17 01:29:07 +01:00
rk3328 rockchip: bring TZRAM_SIZE values in line 2019-12-17 01:29:07 +01:00
rk3368 rockchip: bring TZRAM_SIZE values in line 2019-12-17 01:29:07 +01:00
rk3399 rockchip: really use base+size for secure ddr regions 2019-12-17 01:29:07 +01:00