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Nishanth Menon f577388a32 ti: k3: common: sec_proxy: Fill non-message data fields with 0x0
Sec proxy data buffer is 60 bytes with the last of the registers
indicating transmission completion. This however poses a bit
of a challenge.

The backing memory for sec_proxy is regular memory, and all sec proxy
does is to trigger a burst of all 60 bytes of data over to the target
thread backing ring accelerator. It doesn't do a memory scrub when
it moves data out in the burst. When we transmit multiple messages,
remnants of previous message is also transmitted which results in
some random data being set in TISCI fields of messages that have been
expanded forward.

The entire concept of backward compatibility hinges on the fact that
the unused message fields remain 0x0 allowing for 0x0 value to be
specially considered when backward compatibility of message extension
is done.

So, instead of just writing the completion register, we continue
to fill the message buffer up with 0x0 (note: for partial message
involving completion, we already do this).

This allows us to scale and introduce ABI changes back into TF-A only
as needed.

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: Ie22cb2a319f4aa80aef23ffc7e059207e5d4c640
2020-12-23 06:33:39 -06:00
bl1 Add support for FEAT_MTPMU for Armv8.6 2020-12-11 12:49:20 +00:00
bl2 Add support for FEAT_MTPMU for Armv8.6 2020-12-11 12:49:20 +00:00
bl2u linker_script: move .data section to bl_common.ld.h 2020-04-25 20:09:08 +09:00
bl31 Add support for FEAT_MTPMU for Armv8.6 2020-12-11 12:49:20 +00:00
bl32 Add support for FEAT_MTPMU for Armv8.6 2020-12-11 12:49:20 +00:00
common Merge "Increase type widths to satisfy width requirements" into integration 2020-10-18 14:51:00 +00:00
docs maintainers: Update maintainers for TI port 2020-12-23 06:33:39 -06:00
drivers rcar_gen3: drivers: console: Treat log as device memory 2020-12-08 22:27:13 +00:00
fdts fdts: tc0: Add reserved-memory node for OP-TEE 2020-12-14 18:02:38 +00:00
include Merge changes I0c5f32e8,Id49c124c,Idcfe933d into integration 2020-12-22 15:50:26 +00:00
lib PSCI: fix limit of 256 CPUs caused by cast to unsigned char 2020-12-22 07:39:51 +00:00
make_helpers Merge "Add support for FEAT_MTPMU for Armv8.6" into integration 2020-12-15 19:33:40 +00:00
plat ti: k3: common: sec_proxy: Fill non-message data fields with 0x0 2020-12-23 06:33:39 -06:00
services Aarch64: Add support for FEAT_PANx extensions 2020-11-30 15:24:52 +00:00
tools Update makefile to build fiptool for Windows 2020-09-14 15:06:56 +01:00
.checkpatch.conf Re-apply GIT_COMMIT_ID check for checkpatch 2019-07-12 11:06:24 +01:00
.editorconfig .editorconfig: set max line length to 100 2020-12-03 15:39:23 +00:00
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Makefile Merge "Add support for FEAT_MTPMU for Armv8.6" into integration 2020-12-15 19:33:40 +00:00
dco.txt Drop requirement for CLA in contribution.md 2016-09-27 21:52:03 +01:00
license.rst doc: De-duplicate readme and license files 2019-10-08 16:36:15 +00:00
readme.rst doc: Formatting fixes for readme.rst 2019-10-09 15:37:59 +00:00

readme.rst

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Trusted Firmware-A

Trusted Firmware-A (TF-A) is a reference implementation of secure world software for Arm A-Profile architectures (Armv8-A and Armv7-A), including an Exception Level 3 (EL3) Secure Monitor. It provides a suitable starting point for productization of secure world boot and runtime firmware, in either the AArch32 or AArch64 execution states.

TF-A implements Arm interface standards, including:

The code is designed to be portable and reusable across hardware platforms and software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A with reference implementations of Arm standards to benefit developers working with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration testing, on any secure world code derived from TF-A.

More Info and Documentation

To find out more about Trusted Firmware-A, please view the full documentation that is available through trustedfirmware.org.


Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.

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