Nishanth Menon 3dd87efb2e plat: ti: k3: board: Let explicitly map our SEC_SRAM_BASE to 0x0 ... ENABLE_PIE (position independent executable) is default on K3 platform to handle variant RAM configurations in the system. This, unfortunately does cause confusion while reading the code, so, lets make things explicit by selecting 0x0 as the "SEC_SRAM_BASE" out of which we compute the BL31_BASE depending on usage. Lets also document a warning while at it to help folks copying code over to a custom K3 platform and optimizing size by disabling PIE to modify the defaults. Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I8e67a9210e907e266ff6a78ba4d02e3259bb2b21		2021-03-26 02:25:44 -05:00
..
board	plat: ti: k3: board: Let explicitly map our SEC_SRAM_BASE to 0x0	2021-03-26 02:25:44 -05:00
common	plat: ti: k3: common: bl31_setup: Use BL31_SIZE instead of computing	2021-03-26 02:25:44 -05:00
include	plat: ti: k3: platform_def.h: Define the correct number of max table entries	2021-03-26 02:25:44 -05:00
platform.mk	Use abspath to dereference $BUILD_BASE	2020-08-04 18:02:02 +01:00