kalyani chidambaram fdc08e2ecb Tegra210: SiP handlers to allow PMC access ... This patch adds SiP handler for Tegra210 platforms to service read/write requests for PMC block. None of the secure registers are accessible to the NS world though. Change-Id: I7dc1f10c6a6ee6efc642ddcfb1170fb36d3accff Signed-off-by: kalyani chidambaram <kalyanic@nvidia.com>		2019-01-31 08:49:05 -08:00
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t132	Tegra: console driver compilation from platform makefiles	2019-01-23 10:33:03 -08:00
t186	Tegra: organize memory/mmio apertures to decrease memmap latency	2019-01-31 08:47:41 -08:00
t210	Tegra210: SiP handlers to allow PMC access	2019-01-31 08:49:05 -08:00