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arm-trusted-firmware/plat/nvidia/tegra/soc/t210
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kalyani chidambaram fdc08e2ecb Tegra210: SiP handlers to allow PMC access 
This patch adds SiP handler for Tegra210 platforms to service
read/write requests for PMC block. None of the secure registers
are accessible to the NS world though.

Change-Id: I7dc1f10c6a6ee6efc642ddcfb1170fb36d3accff
Signed-off-by: kalyani chidambaram <kalyanic@nvidia.com>
 		2019-01-31 08:49:05 -08:00
..
drivers/se Tegra210_B01: SC7: Select RNG mode based on ECID 2019-01-18 09:21:51 -08:00
plat_psci_handlers.c Tegra210: power off all DMA masters before System Suspend entry 2019-01-31 08:48:56 -08:00
plat_secondary.c Sanitise includes across codebase 2019-01-04 10:43:17 +00:00
plat_setup.c Tegra210: power off all DMA masters before System Suspend entry 2019-01-31 08:48:56 -08:00
plat_sip_calls.c Tegra210: SiP handlers to allow PMC access 2019-01-31 08:49:05 -08:00
platform_t210.mk Tegra210: SiP handlers to allow PMC access 2019-01-31 08:49:05 -08:00