dp-arm d832aee900 aarch64: Enable Statistical Profiling Extensions for lower ELs ... SPE is only supported in non-secure state. Accesses to SPE specific registers from SEL1 will trap to EL3. During a world switch, before `TTBR` is modified the SPE profiling buffers are drained. This is to avoid a potential invalid memory access in SEL1. SPE is architecturally specified only for AArch64. Change-Id: I04a96427d9f9d586c331913d815fdc726855f6b0 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>		2017-06-22 10:33:19 +01:00
..
aarch32	Fully initialise essential control registers	2017-06-21 17:57:54 +01:00
aarch64	aarch64: Enable Statistical Profiling Extensions for lower ELs	2017-06-22 10:33:19 +01:00
cpu_data_array.c	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00