arm-trusted-firmware/plat/intel/soc
Hadi Asyrafi b90f207a1d Invalidate dcache build option for bl2 entry at EL3
Some of the platform (ie. Agilex) make use of CCU IPs which will only be
initialized during bl2_el3_early_platform_setup. Any operation to the
cache beforehand will crash the platform. Hence, this will provide an
option to skip the data cache invalidation upon bl2 entry at EL3

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I2c924ed0589a72d0034714c31be8fe57237d1f06
2019-09-12 12:36:31 +00:00
..
agilex Invalidate dcache build option for bl2 entry at EL3 2019-09-12 12:36:31 +00:00
common intel: Platform common code refactor 2019-08-07 12:19:11 +00:00
stratix10 intel: stratix10: Fix reliance on hard coded clock information 2019-08-13 18:20:53 +08:00