678 lines
34 KiB
Org Mode
678 lines
34 KiB
Org Mode
* Instruction Listing
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** 00 xx xx xx :: NOP
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| Hex | Name | Comment |
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|-------------+-----------------+---------------------------------------------------------------------------|
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| 00 00 00 00 | Proper NOP | |
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| 00 xx xx xx | NOP equivelent. | Although these instructions will all be treated as NOPs. DO NOT USE THEM. |
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** 4OP Groups
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4OP nn is the XOP, a = b OP c Cond d
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*** 01 nn ab cd :: 4OP Integer group
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**** Add subgroup
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| Hex | Name | Comment |
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|-------------+------------------+---------------------------------------------|
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| 01 00 ab cd | ADD.CI a b c d | a = b + c + CARRY? d [signed] |
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| 01 01 ab cd | ADD.CO a b c d | a = b + c; d = CARRY? [signed] |
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| 01 02 ab cd | ADD.CIO a b c d | a = b + c + CARRY? d; d = CARRY? [signed] |
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| 01 03 ab cd | ADDU.CI a b c d | a = b + c + CARRY? d [unsigned] |
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| 01 04 ab cd | ADDU.CO a b c d | a = b + c; d = CARRY? [unsigned] |
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| 01 05 ab cd | ADDU.CIO a b c d | a = b + c + CARRY? d; d = CARRY? [unsigned] |
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**** Subtract subgroup
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| Hex | Name | Comment |
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|-------------+------------------+-----------------------------------------------|
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| 01 06 ab cd | SUB.BI a b c d | a = b - c - BORROW? d [signed] |
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| 01 07 ab cd | SUB.BO a b c d | a = b - c; d = BORROW? [signed] |
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| 01 08 ab cd | SUB.BIO a b c d | a = b - c - BORROW? d; d = BORROW? [signed] |
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| 01 09 ab cd | SUBU.BI a b c d | a = b - c - BORROW? d [unsigned] |
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| 01 0A ab cd | SUBU.BO a b c d | a = b - c; d = BORROW? [unsigned] |
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| 01 0B ab cd | SUBU.BIO a b c d | a = b - c - BORROW? d; d = BORROW? [unsigned] |
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**** long math subgroup
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| Hex | Name | Comment |
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|-------------+-------------------+--------------------------------------|
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| 01 0C ab cd | MULTIPLY a b c d | a = MUL c d; b = MULH c d [signed] |
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| 01 0D ab cd | MULTIPLYU a b c d | a = MUL c d; b = MULH c d [unsigned] |
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| 01 0E ab cd | DIVIDE a b c d | a = DIV c d; b = MOD c d [signed] |
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| 01 0F ab cd | DIVIDEU a b c d | a = DIV c d; b = MOD c d [unsigned] |
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**** Logic subgroup
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| Hex | Name | Comment |
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|-------------+---------------+-----------------------------------------|
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| 01 10 ab cd | MUX a b c d | a = (c & ~b) \vert (d & b) |
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| 01 11 ab cd | NMUX a b c d | a = (c & b) \vert (d & ~b) |
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| 01 12 ab cd | SORT a b c d | a = MAX(c, d); b = MIN(c, d) [signed] |
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| 01 13 ab cd | SORTU a b c d | a = MAX(c, d); b = MIN(c, d) [unsigned] |
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**** Reserved Block
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| Hex | Name |
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|-------------+----------|
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| 01 14 xx xx | Reserved |
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| ... | Reserved |
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| 01 FF xx xx | Reserved |
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*** 02 nn ab cd :: 4OP Floating group
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*** 03 nn ab cd :: 4OP SIMD group
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*** 04 nn ab cd :: 4OP Reserved group
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** 3OP Groups
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3OP nn n is the XOP, a = b OP c
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*** 05 nn na bc :: 3OP Integer group
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**** Turing group
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| Hex | Name | Comment |
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|-------------+------------+------------------------|
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| 05 00 0a bc | ADD a b c | a = b + c [signed] |
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| 05 00 1a bc | ADDU a b c | a = b + c [unsigned] |
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| 05 00 2a bc | SUB a b c | a = b - c [signed] |
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| 05 00 3a bc | SUBU a b c | a = b - c [unsigned] |
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| 05 00 4a bc | CMP a b c | a = b CMP c [signed] |
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| 05 00 5a bc | CMPU a b c | a = b CMP c [unsigned] |
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**** Convience group
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| Hex | Name | Comment |
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|-------------+-------------+----------------------------------------|
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| 05 00 6a bc | MUL a b c | a = b * c [signed] bottom n bits |
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| 05 00 7a bc | MULH a b c | a = (b * c) >> n [signed] top n bits |
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| 05 00 8a bc | MULU a b c | a = b * c [unsigned] bottom n bits |
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| 05 00 9a bc | MULUH a b c | a = (b * c) >> n [unsigned] top n bits |
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| 05 00 Aa bc | DIV a b c | a = b / c [signed] |
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| 05 00 Ba bc | MOD a b c | a = b % c [signed] |
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| 05 00 Ca bc | DIVU a b c | a = b / c [unsigned] |
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| 05 00 Da bc | MODU a b c | a = b % c [unsigned] |
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**** Reserved group 0
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| Hex | Name |
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|-------------+----------|
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| 05 00 Ex xx | Reserved |
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| 05 00 Fx xx | Reserved |
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**** Sort group
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| Hex | Name | Comment |
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|-------------+------------+--------------------------|
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| 05 01 0a bc | MAX a b c | a = MAX(b, c) [signed] |
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| 05 01 1a bc | MAXU a b c | a = MAX(b, c) [unsigned] |
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| 05 01 2a bc | MIN a b c | a = MIN(b, c) [signed] |
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| 05 01 3a bc | MINU a b c | a = MIN(b, c) [unsigned] |
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**** Binary packing group
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| Hex | Name | Comment |
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|-------------+------------------+--------------------------------------|
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| 05 01 4a bc | PACK a b c | a = PACK(b, c) [[./img/pack.gif]] |
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| 05 01 5a bc | UNPACK a b c | a = UNPACK(b, c) [[./img/unpack.gif]] |
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| 05 01 6a bc | PACK8.CO a b c | a = PACK(b) c = Overload? [signed] |
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| 05 01 7a bc | PACK8U.CO a b c | a = PACK(b) c = Overload? [unsigned] |
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| 05 01 8a bc | PACK16.CO a b c | a = PACK(b) c = Overload? [signed] |
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| 05 01 9a bc | PACK16U.CO a b c | a = PACK(b) c = Overload? [unsigned] |
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| 05 01 Aa bc | PACK32.CO a b c | a = PACK(b) c = Overload? [signed] |
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| 05 01 Ba bc | PACK32U.CO a b c | a = PACK(b) c = Overload? [unsigned] |
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| 05 01 Ca bc | Reserved | |
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| 05 01 Da bc | Reserved | |
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| 05 01 Ex xx | Reserved | |
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| 05 01 Fx xx | Reserved | |
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**** Logical group
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| Hex | Name | Comment |
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|-------------+------------+---------------------------------------|
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| 05 02 0a bc | AND a b c | a = b & c |
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| 05 02 1a bc | OR a b c | a = b \vert c |
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| 05 02 2a bc | XOR a b c | a = b XOR c |
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| 05 02 3a bc | NAND a b c | a != b & c |
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| 05 02 4a bc | NOR a b c | a != b \vert c |
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| 05 02 5a bc | XNOR a b c | a != b XOR c |
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| 05 02 6a bc | MPQ a b c | a = b MPQ c [Converse Nonimplication] |
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| 05 02 7a bc | LPQ a b c | a = b LPQ c [Material Nonimplication] |
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| 05 02 8a bc | CPQ a b c | a = b CPQ c [Material Implication] |
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| 05 02 9a bc | BPQ a b c | a = b BPQ c [Converse Implication] |
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**** Reserved group 1
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| Hex | Name |
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|-------------+----------|
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| 05 02 Ax xx | Reserved |
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| ... | Reserved |
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| 05 02 Fx xx | Reserved |
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**** Bit rotation group
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| Hex | Name | Comment |
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|-------------+-----------+---------------------------------------|
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| 05 03 0a bc | SAL a b c | a = b << c [arithmetically] |
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| 05 03 1a bc | SAR a b c | a = b >> c [arithmetically] |
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| 05 03 2a bc | SL0 a b c | a = b << c [Fill with zeros] |
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| 05 03 3a bc | SR0 a b c | a = b >> c [Fill with zeros] |
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| 05 03 4a bc | SL1 a b c | a = b << c [Fill with ones] |
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| 05 03 5a bc | SR1 a b c | a = b >> c [Fill with ones] |
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| 05 03 6a bc | ROL a b c | a = ROL(b, c) [Circular rotate left] |
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| 05 03 7a bc | ROR a b c | a = ROR(b, c) [Circular rotate right] |
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**** Load group
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| Hex | Name | Comment |
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|-------------+----------------+--------------------------------|
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| 05 03 8a bc | LOADX a b c | a = MEM[b+c] |
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| 05 03 9a bc | LOADX8 a b c | a = MEM[b+c] [signed 8bits] |
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| 05 03 Aa bc | LOADXU8 a b c | a = MEM[b+c] [unsigned 8bits] |
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| 05 03 Ba bc | LOADX16 a b c | a = MEM[b+c] [signed 16bits] |
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| 05 03 Ca bc | LOADXU16 a b c | a = MEM[b+c] [unsigned 16bits] |
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| 05 03 Da bc | LOADX32 a b c | a = MEM[b+c] [signed 32bits] |
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| 05 03 Ea bc | LOADXU32 a b c | a = MEM[b+c] [unsigned 32bits] |
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| 05 03 Fx xx | Reserved | |
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| 05 04 0x xx | Reserved | |
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| 05 04 1x xx | Reserved | |
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| 05 04 2x xx | Reserved | |
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| 05 04 3x xx | Reserved | |
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| 05 04 4x xx | Reserved | |
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| 05 04 5x xx | Reserved | |
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| 05 04 6x xx | Reserved | |
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| 05 04 7x xx | Reserved | |
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**** Store group
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| Hex | Name | Comment |
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|-------------+----------------+-----------------------|
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| 05 04 8a bc | STOREX a b c | MEM[b+c] = a |
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| 05 04 9a bc | STOREX8 a b c | MEM[b+c] = a [8bits] |
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| 05 04 Aa bc | STOREX16 a b c | MEM[b+c] = a [16bits] |
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| 05 04 Ba bc | STOREX32 a b c | MEM[b+c] = a [32bits] |
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| 05 04 Cx xx | Reserved | |
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| 05 04 Dx xx | Reserved | |
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| 05 04 Ex xx | Reserved | |
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| 05 04 Fx xx | Reserved | |
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**** CMPJUMP group
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| Hex | Name | Comment |
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|-------------+-------------------+-----------------|
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| 05 05 0a bc | CMPJUMP.G a b c | a > b ? PC = c |
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| 05 05 1a bc | CMPJUMP.GE a b c | a >= b ? PC = c |
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| 05 05 2a bc | CMPJUMP.E a b c | a == b ? PC = c |
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| 05 05 3a bc | CMPJUMP.NE a b c | a != b ? PC = c |
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| 05 05 4a bc | CMPJUMP.LE a b c | a <= b ? PC = c |
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| 05 05 5a bc | CMPJUMP.L a b c | a < b ? PC = c |
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| 05 05 6x xx | Reserved | |
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| ... | Reserved | |
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| 05 05 Fx xx | Reserved | |
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| 05 06 0a bc | CMPJUMPU.G a b c | a > b ? PC = c |
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| 05 06 1a bc | CMPJUMPU.GE a b c | a >= b ? PC = c |
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| 05 06 2a bc | Reserved | |
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| 05 06 3a bc | Reserved | |
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| 05 06 4a bc | CMPJUMPU.LE a b c | a <= b ? PC = c |
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| 05 06 5a bc | CMPJUMPU.L a b c | a < b ? PC = c |
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| 05 06 6x xx | Reserved | |
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| ... | Reserved | |
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| 05 06 Fx xx | Reserved | |
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**** Reserved group 2
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| Hex | Name |
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|-------------+----------|
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| 05 07 0x xx | Reserved |
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| ... | Reserved |
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| 05 FF Fx xx | Reserved |
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*** 06 nn na bc :: 3OP Floating group
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*** 07 nn na bc :: 3OP SIMD group
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*** 08 nn na bc :: 3OP Reserved group
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** 2OP Groups
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2OP nn nn is the XOP, a = OP b
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*** 09 nn nn ab :: 2OP Integer group
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**** Numeric group
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| Hex | Name | Comment |
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|-------------+----------+----------------------|
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| 09 00 00 ab | NEG a b | a = (b > 0) ? -b : b |
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| 09 00 01 ab | ABS a b | a = \vert b \vert |
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| 09 00 02 ab | NABS a b | a = - \vert b \vert |
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**** Movement group
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| Hex | Name | Comment |
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|-------------+----------+--------------|
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| 09 00 03 ab | SWAP a b | a <=> b |
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| 09 00 04 ab | COPY a b | a = b |
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| 09 00 05 ab | MOVE a b | a = b; b = 0 |
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| 09 00 06 ab | NOT a b | a = !b |
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**** Reserved Block 0
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| Hex | Name |
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|-------------+----------|
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| 09 00 07 xx | Reserved |
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| ... | Reserved |
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| 09 00 FF xx | Reserved |
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**** Function call group
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| Hex | Name | Comment |
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|-------------+------------+-------------------------------------------------------|
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| 09 01 00 ab | BRANCH a b | MEM[b] = PC; PC = a |
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| 09 01 01 ab | CALL a b | MEM[b] = PC; b = b + (register size in bytes); PC = a |
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**** Stack group
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| Hex | Name | Comment |
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|-------------+------------+-----------------------------------------------------------|
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| 09 02 00 ab | PUSHR a b | MEM[b] = a; b = b + (register size in bytes) |
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| 09 02 01 ab | PUSH8 a b | MEM[b] = bottom_8_bits(a); b = b + 1 |
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| 09 02 02 ab | PUSH16 a b | MEM[b] = bottome_16_bits(a); b = b + 2 |
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| 09 02 03 ab | PUSH32 a b | MEM[b] = bottome_32_bits(a); b = b + 4 |
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| 09 02 04 xx | Reserved | |
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| ... | Reserved | |
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| 09 02 7F xx | Reserved | |
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| 09 02 80 ab | POPR a b | a = MEM[b]; MEM[b] = 0; b = b - (register size in bytes) |
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| 09 02 81 ab | POP8 a b | a = MEM[b] (signed); MEM[b] = 0; b = b - 1 |
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| 09 02 82 ab | POPU8 a b | a = MEM[b] (unsigned); MEM[b] = 0; b = b - 1 |
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| 09 02 83 ab | POP16 a b | a = MEM[b] (signed); MEM[b] = 0; b = b - 2 |
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| 09 02 84 ab | POPU16 a b | a = MEM[b] (unsigned); MEM[b] = 0; b = b - 2 |
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| 09 02 85 ab | POP32 a b | a = MEM[b] (signed); MEM[b] = 0; b = b - 4 |
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| 09 02 86 ab | POPU32 a b | a = MEM[b] (signed); MEM[b] = 0; b = b - 4 |
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| ... | Reserved | |
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| 09 02 FF xx | Reserved | |
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**** CMPSKIP group
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| Hex | Name | Comment |
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|-------------+-----------------+--------------------------------|
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| 09 03 00 ab | CMPSKIP.G a b | a > b ? Skip Next instruction |
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| 09 03 01 ab | CMPSKIP.GE a b | a >= b ? Skip Next instruction |
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| 09 03 02 ab | CMPSKIP.E a b | a == b ? Skip Next instruction |
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| 09 03 03 ab | CMPSKIP.NE a b | a != b ? Skip Next instruction |
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| 09 03 04 ab | CMPSKIP.LE a b | a <= b ? Skip Next instruction |
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| 09 03 05 ab | CMPSKIP.L a b | a < b ? Skip Next instruction |
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| 09 03 06 xx | Reserved | |
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| ... | Reserved | |
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| 09 03 7F ab | Reserved | |
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| 09 03 80 ab | CMPSKIPU.G a b | a > b ? Skip Next instruction |
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| 09 03 81 ab | CMPSKIPU.GE a b | a >= b ? Skip Next instruction |
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| 09 03 82 ab | Reserved | |
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| 09 03 83 ab | Reserved | |
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| 09 03 84 ab | CMPSKIPU.LE a b | a <= b ? Skip Next instruction |
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| 09 03 85 ab | CMPSKIPU.L a b | a < b ? Skip Next instruction |
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| 09 03 86 xx | Reserved | |
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| ... | Reserved | |
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| 09 03 FF ab | Reserved | |
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**** Reserved Block 1
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| Hex | Name |
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|-------------+----------|
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| 09 02 87 xx | Reserved |
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| ... | Reserved |
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| 09 FF FF xx | Reserved |
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*** 0A nn nn ab :: 2OP Floating group
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*** 0B nn nn ab :: 2OP SIMD group
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*** 0C nn nn ab :: 2OP Reserved group
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** 1OP Groups
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1OP nn nn n is the XOP, a = OP a
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*** 0D nn nn na :: 1OP group
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**** State group
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| Hex | Name | Comment |
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|-------------+------------+---------------|
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| 0D 00 00 0a | READPC a | a = PC |
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| 0D 00 00 1a | READSCID a | a = SCID |
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| 0D 00 00 2a | FALSE a | a = 0 |
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| 0D 00 00 3a | TRUE a | a = FF ... FF |
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**** Reserved block 0
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| Hex | Name |
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|-------------+----------|
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| 0D 00 00 4x | Reserved |
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| ... | Reserved |
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| 0D 00 FF Fx | Reserved |
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**** Function return group
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| Hex | Name | Comment |
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|-------------+-----------------+-----------------------------------------------|
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| 0D 01 00 0a | JSR_COROUTINE a | PC = a |
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| 0D 01 00 1a | RET a | PC = MEM[a]; a = a - (register size in bytes) |
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**** Reserved block 1
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| Hex | Name |
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|-------------+----------|
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| 0D 01 00 2x | Reserved |
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| ... | Reserved |
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| 0D 01 FF Fx | Reserved |
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**** Stack state group
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| Hex | Name | Comment |
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|-------------+----------+-----------------------------------------------|
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| 0D 02 00 0a | PUSHPC a | MEM[a] = PC; a = a + (register size in bytes) |
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| 0D 02 00 1a | POPPC a | PC = MEM[a]; a = a - (register size in bytes) |
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**** Reserved
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| Hex | Name |
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|-------------+----------|
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| 0D 02 00 2x | Reserved |
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| ... | Reserved |
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| 0D FF FF Fx | Reserved |
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** 2OPI Groups
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2OPI ii ii is the Immediate, a = b OP ii ii
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*** 2OPI Integer
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| Hex | Name | Comment |
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|-------------+-----------------+--------------------------|
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| 0E ab ii ii | ADDI a b ii ii | a = b + ii ii [signed] |
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| 0F ab ii ii | ADDUI a b ii ii | a = b + ii ii [unsigned] |
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| 10 ab ii ii | SUBI a b ii ii | a = b - ii ii [signed] |
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| 11 ab ii ii | SUBUI a b ii ii | a = b - ii ii [unsigned] |
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*** 2OPI Integer signed compare
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| Hex | Name | Comment |
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|-------------+----------------+--------------------------|
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| 12 ab ii ii | CMPI a b ii ii | a = b CMP ii ii [signed] |
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*** 2OPI Integer Load
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| Hex | Name | Comment |
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|-------------+-------------------+--------------------------------------|
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| 13 ab ii ii | LOAD a b ii ii | a = MEM[b + ii ii] |
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| 14 ab ii ii | LOAD8 a b ii ii | a = MEM[b + ii ii] [signed 8bits] |
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| 15 ab ii ii | LOADU8 a b ii ii | a = MEM[b + ii ii] [unsigned 8bits] |
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| 16 ab ii ii | LOAD16 a b ii ii | a = MEM[b + ii ii] [signed 16bits] |
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| 17 ab ii ii | LOADU16 a b ii ii | a = MEM[b + ii ii] [unsigned 16bits] |
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| 18 ab ii ii | LOAD32 a b ii ii | a = MEM[b + ii ii] [signed 32bits] |
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| 19 ab ii ii | LOADU32 a b ii ii | a = MEM[b + ii ii] [unsigned 32bits] |
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| 1A ab ii ii | Reserved | |
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| 1B ab ii ii | Reserved | |
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| 1C ab ii ii | Reserved | |
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| 1D ab ii ii | Reserved | |
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| 1E ab ii ii | Reserved | |
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*** 2OPI Integer unsigned compare
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| Hex | Name | Comment |
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|-------------+-----------------+----------------------------|
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| 1F ab ii ii | CMPUI a b ii ii | a = b CMP ii ii [unsigned] |
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*** 2OPI Integer store
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| Hex | Name | Comment |
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|-------------+----------------+------------------------------------|
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| 20 ab ii ii | STORE a b ii | MEM[b + ii ii] = a |
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| 21 ab ii ii | STORE8 a b ii | MEM[b + ii ii] = a [signed 8bits] |
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| 22 ab ii ii | STORE16 a b ii | MEM[b + ii ii] = a [signed 16bits] |
|
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| 23 ab ii ii | STORE32 a b ii | MEM[b + ii ii] = a [signed 32bits] |
|
|
| 24 ab ii ii | Reserved | |
|
|
| 25 ab ii ii | Reserved | |
|
|
| 26 ab ii ii | Reserved | |
|
|
| 27 ab ii ii | Reserved | |
|
|
| 28 ab ii ii | Reserved | |
|
|
| 29 ab ii ii | Reserved | |
|
|
| 2A ab ii ii | Reserved | |
|
|
| 2B ab ii ii | Reserved | |
|
|
|
|
** 1OPI Groups
|
|
1OPI i ii ii is the Immediate, a = a OP i ii ii
|
|
|
|
*** Conditional Integer Jumps
|
|
| Hex | Name | Comment |
|
|
|-------------+-----------------+--------------------------------------|
|
|
| 2C 0a ii ii | JUMP.C a ii ii | Carry? a; PC = PC + i ii ii |
|
|
| 2C 1a ii ii | JUMP.B a ii ii | Borrow? a; PC = PC + i ii ii |
|
|
| 2C 2a ii ii | JUMP.O a ii ii | Overflow? a; PC = PC + i ii ii |
|
|
| 2C 3a ii ii | JUMP.G a ii ii | GT? a; PC = PC + i ii ii |
|
|
| 2C 4a ii ii | JUMP.GE a ii ii | GT? a \vert EQ? a; PC = PC + i ii ii |
|
|
| 2C 5a ii ii | JUMP.E a ii ii | EQ? a; PC = PC + i ii ii |
|
|
| 2C 6a ii ii | JUMP.NE a ii ii | NEQ? a; PC = PC + i ii ii |
|
|
| 2C 7a ii ii | JUMP.LE a ii ii | LT? a \vert EQ? a; PC = PC + i ii ii |
|
|
| 2C 8a ii ii | JUMP.L a ii ii | LT? a; PC = PC + i ii ii |
|
|
| 2C 9a ii ii | JUMP.Z a ii ii | ZERO? a; PC = PC + i ii ii |
|
|
| 2C Aa ii ii | JUMP.NZ a ii ii | NZERO? a; PC = PC + i ii ii |
|
|
| 2C Ba ii ii | JUMP.P | POSITIVE? a; PC = PC + ii ii |
|
|
| 2C Ca ii ii | JUMP.NP | NEGATIVE? a; PC = PC + ii ii |
|
|
| 2C Dx xx xx | Reserved | |
|
|
| 2C Ex xx xx | Reserved | |
|
|
| 2C Fx xx xx | Reserved | |
|
|
|
|
*** Branch Immediates
|
|
| Hex | Name | Comment |
|
|
|-------------+----------------+----------------------------------------------------------------|
|
|
| 2D 0a ii ii | CALLI a ii ii | MEM[a] = PC; a = a + (register size in bytes); PC = PC + ii ii |
|
|
| 2D 1a ii ii | LOADI a ii ii | a = ii ii (signed) |
|
|
| 2D 2a ii ii | LOADUI a ii ii | a = ii ii (unsigned) |
|
|
| 2D 3a ii ii | SALI a ii ii | a = a << ii ii [arithmetically] |
|
|
| 2D 4a ii ii | SARI a ii ii | a = a >> ii ii [arithmetically] |
|
|
| 2D 5a ii ii | SL0I a ii ii | a = a << ii ii [Fill with zeros] |
|
|
| 2D 6a ii ii | SR0I a ii ii | a = a >> ii ii [Fill with zeros] |
|
|
| 2D 7a ii ii | SL1I a ii ii | a = a << ii ii [Fill with ones] |
|
|
| 2D 8a ii ii | SR1I a ii ii | a = a >> ii ii [Fill with ones] |
|
|
|
|
*** Relative Loads
|
|
| Hex | Name | Comment |
|
|
|-------------+------------------+----------------------------------------|
|
|
| 2E 0a ii ii | LOADR a ii ii | a = MEM[ip + ii ii] |
|
|
| 2E 1a ii ii | LOADR8 a ii ii | a = MEM[ip + ii ii] [signed 8 bits] |
|
|
| 2E 2a ii ii | LOADRU8 a ii ii | a = MEM[ip + ii ii] [unsigned 8 bits] |
|
|
| 2E 3a ii ii | LOADR16 a ii ii | a = MEM[ip + ii ii] [signed 16 bits] |
|
|
| 2E 4a ii ii | LOADRU16 a ii ii | a = MEM[ip + ii ii] [unsigned 16 bits] |
|
|
| 2E 5a ii ii | LOADR32 a ii ii | a = MEM[ip + ii ii] [signed 32 bits] |
|
|
| 2E 6a ii ii | LOADRU32 a ii ii | a = MEM[ip + ii ii] [unsigned 32 bits] |
|
|
| 2E 7a ii ii | Reserved | |
|
|
| 2E 8a ii ii | Reserved | |
|
|
| 2E 9a ii ii | Reserved | |
|
|
| 2E Aa ii ii | Reserved | |
|
|
| 2E Ba ii ii | Reserved | |
|
|
| 2E Ca ii ii | Reserved | |
|
|
| 2E Da ii ii | Reserved | |
|
|
| 2E Ea ii ii | Reserved | |
|
|
| 2E Fa ii ii | Reserved | |
|
|
|
|
*** Relative Stores
|
|
| Hex | Name | Comment |
|
|
|-------------+------------------+--------------------------------------|
|
|
| 2F 0a ii ii | STORER a ii ii | MEM[ip + ii ii] = a |
|
|
| 2F 1a ii ii | STORER8 a ii ii | MEM[ip + ii ii] = a [signed 8 bits] |
|
|
| 2F 2a ii ii | STORER16 a ii ii | MEM[ip + ii ii] = a [signed 16 bits] |
|
|
| 2F 3a ii ii | STORER32 a ii ii | MEM[ip + ii ii] = a [signed 32 bits] |
|
|
| 2F 4a ii ii | Reserved | |
|
|
| 2F 5a ii ii | Reserved | |
|
|
| 2F 6a ii ii | Reserved | |
|
|
| 2F 7a ii ii | Reserved | |
|
|
| 2F 8a ii ii | Reserved | |
|
|
| 2F 9a ii ii | Reserved | |
|
|
| 2F Aa ii ii | Reserved | |
|
|
| 2F Ba ii ii | Reserved | |
|
|
| 2F Ca ii ii | Reserved | |
|
|
| 2F Da ii ii | Reserved | |
|
|
| 2F Ea ii ii | Reserved | |
|
|
| 2F Fa ii ii | Reserved | |
|
|
|
|
** 0OPI group
|
|
0OPI ii ii is the Immediate, OP ii ii
|
|
|
|
*** Unconditional jumps
|
|
| Hex | Name | Comment |
|
|
|-------------+------------+-----------------|
|
|
| 3C 00 ii ii | JUMP ii ii | PC = PC + ii ii |
|
|
|
|
** Reserved Block 0
|
|
At this time these instructions only produce a warning; but could do anything.
|
|
DO NOT USE.
|
|
|
|
| Hex | Name |
|
|
|-------------+----------|
|
|
| 3D 00 00 00 | Reserved |
|
|
| ... | Reserved |
|
|
| 41 FF FF FF | Reserve |
|
|
|
|
** HALCODE Group
|
|
42 hh hh hh is the HALCODE callID, invalid HALCODE SHOULD NOT BE USED.
|
|
|
|
*** HALCODE Reserved for Operating Systems
|
|
The following block contains both instructions that are reserved for Operating systems and for internal use by Operating systems
|
|
|
|
| Hex | Name |
|
|
|-------------+----------|
|
|
| 42 00 xx xx | Reserved |
|
|
| ... | Reserved |
|
|
| 42 0F xx xx | Reserved |
|
|
|
|
*** Tape console HALCODE
|
|
This HALCODE is used for interacting with any tape console attached to the system.
|
|
|
|
**** Reference specific notes
|
|
In this reference implementation we will be interacting with a simplified version of the series 10 console.
|
|
All compatible implementations need to ensure to implement functional equivelents.
|
|
Provided of course that any deviations would not change any output specified to be written to tape.
|
|
Padding with Zeros til start/end of page/segment however is acceptable.
|
|
|
|
**** Standard compatibility requirements
|
|
The following 3 devices must exist with the following exact IDs
|
|
| Interface Name | ID |
|
|
|----------------+-------------|
|
|
| Keyboard/tty | 00 00 00 00 |
|
|
| Tape 1 | 00 00 11 00 |
|
|
| Tape 2 | 00 00 11 01 |
|
|
|
|
**** Required Device HALCODE
|
|
| Hex | Name | Comment |
|
|
|-------------+-------------+------------------------------------------------------------------------------------------------|
|
|
| 42 10 00 00 | FOPEN_READ | Feed on device who's ID matches the contents of register 0 until first non-zero byte is found. |
|
|
| 42 10 00 01 | FOPEN_WRITE | Feed on device who's ID matches the contents of register 0 until first zero byte is found |
|
|
| 42 10 00 02 | FCLOSE | Close out writes to device who's ID matches the contents of register 0. |
|
|
| 42 10 00 03 | REWIND | rewind back to first non-zero byte found on tape. |
|
|
| 42 10 00 04 | FSEEK | seek forward or backward the number of bytes specified in register 1 on |
|
|
| | | the device who's ID matches the contents of register 0. |
|
|
|
|
**** Reserved Block for Hardware specific implementation details
|
|
| Hex | Name |
|
|
|-------------+----------|
|
|
| 42 10 00 04 | Reserved |
|
|
| ... | Reserved |
|
|
| 42 10 00 FF | Reserved |
|
|
|
|
**** Required Device capability HALCODE
|
|
***** Device Read HALCODE
|
|
| Hex | Name | Comment |
|
|
|-------------+-------+-------------------------------------------------------------------|
|
|
| 42 10 01 00 | FGETC | read 1 byte into register 0 from device who's ID is in register 1 |
|
|
|
|
***** Reserved Block for Hardware specific implementation details
|
|
| Hex | Name |
|
|
|-------------+----------|
|
|
| 42 10 01 01 | Reserved |
|
|
| ... | Reserved |
|
|
| 42 10 01 FF | Reserved |
|
|
|
|
***** Device Write HALCODE
|
|
| Hex | Name | Comment |
|
|
|-------------+-------+------------------------------------------------------------------|
|
|
| 42 10 02 00 | FPUTC | write 1 byte from register 0 to device who's ID is in register 1 |
|
|
|
|
***** Reserved Block for Hardware specific implementation details
|
|
| Hex | Name |
|
|
|-------------+----------|
|
|
| 42 10 02 01 | Reserved |
|
|
| ... | Reserved |
|
|
| 42 10 02 FF | Reserved |
|
|
|
|
**** Reserved Block for Future HALCODE Expansion
|
|
| Hex | Name |
|
|
|-------------+----------|
|
|
| 42 10 03 00 | Reserved |
|
|
| ... | Reserved |
|
|
| 42 FF FF FF | Reserved |
|
|
|
|
** Reserved Block 1
|
|
At this time these instructions only produce a warning; but could do anything.
|
|
DO NOT USE.
|
|
| Hex | Name |
|
|
|-------------+----------|
|
|
| 43 00 00 00 | Reserved |
|
|
| ... | Reserved |
|
|
| 9F FF FF FF | Reserved |
|
|
|
|
** CMPSKIPI Group
|
|
| Hex | Name | Comment |
|
|
|-------------+----------------------+------------------------------------|
|
|
| A0 0a ii ii | CMPSKIPI.G a ii ii | a > ii ii ? Skip Next instruction |
|
|
| A0 1a ii ii | CMPSKIPI.GE a ii ii | a >= ii ii ? Skip Next instruction |
|
|
| A0 2a ii ii | CMPSKIPI.E a ii ii | a == ii ii ? Skip Next instruction |
|
|
| A0 3a ii ii | CMPSKIPI.NE a ii ii | a != ii ii ? Skip Next instruction |
|
|
| A0 4a ii ii | CMPSKIPI.LE a ii ii | a <= ii ii ? Skip Next instruction |
|
|
| A0 5a ii ii | CMPSKIPI.L a ii ii | a < ii ii ? Skip Next instruction |
|
|
| A0 6a ii ii | Reserved | |
|
|
| ... | Reserved | |
|
|
| A0 Fa ii ii | Reserved | |
|
|
| A1 0a ii ii | CMPSKIPUI.G a ii ii | a > ii ii ? Skip Next instruction |
|
|
| A1 1a ii ii | CMPSKIPUI.GE a ii ii | a >= ii ii ? Skip Next instruction |
|
|
| A1 2a ii ii | Reserved | |
|
|
| A1 3a ii ii | Reserved | |
|
|
| A1 4a ii ii | CMPSKIPUI.LE a ii ii | a <= ii ii ? Skip Next instruction |
|
|
| A1 5a ii ii | CMPSKIPUI.L a ii ii | a < ii ii ? Skip Next instruction |
|
|
| A1 6a ii ii | Reserved | |
|
|
| ... | Reserved | |
|
|
| A1 Fa ii ii | Reserved | |
|
|
|
|
** Reserved Block 2
|
|
At this time these instructions only produce a warning; but could do anything.
|
|
DO NOT USE.
|
|
| Hex | Name |
|
|
|-------------+----------|
|
|
| A2 00 00 00 | Reserved |
|
|
| ... | Reserved |
|
|
| AF FF FF FF | Reserved |
|
|
|
|
** Bit optimization group
|
|
| Hex | Name | Comment |
|
|
|-------------+-----------------+--------------------|
|
|
| B0 ab ii ii | ANDI a b ii ii | a = b & ii ii |
|
|
| B1 ab ii ii | ORI a b ii ii | a = b \vert ii ii |
|
|
| B2 ab ii ii | XORI a b ii ii | a = b XOR ii ii |
|
|
| B3 ab ii ii | NANDI a b ii ii | a != b && ii ii |
|
|
| B4 ab ii ii | NORI a b ii ii | a != b \vert ii ii |
|
|
| B5 ab ii ii | XNORI a b ii ii | a != b XOR ii ii |
|
|
| B6 00 00 00 | Reserved | |
|
|
| ... | Reserved | |
|
|
| BF FF FF FF | Reserved | |
|
|
|
|
** CMPJUMPI Group
|
|
| Hex | Name | Comment |
|
|
|-------------+------------------------+-------------------------------------|
|
|
| C0 ab ii ii | CMPJUMPI.G a b ii ii | a > b ? PC = PC + ii ii |
|
|
| C1 ab ii ii | CMPJUMPI.GE a b ii ii | a >= b ? PC = PC + ii ii |
|
|
| C2 ab ii ii | CMPJUMPI.E a b ii ii | a == b ? PC = PC + ii ii |
|
|
| C3 ab ii ii | CMPJUMPI.NE a b ii ii | a != b ? PC = PC + ii ii |
|
|
| C4 ab ii ii | CMPJUMPI.LE a b ii ii | a <= b ? PC = PC + ii ii |
|
|
| C5 ab ii ii | CMPJUMPI.L a b ii ii | a < b ? PC = PC + ii ii |
|
|
| C6 ab ii ii | Reserved | |
|
|
| ... | Reserved | |
|
|
| CF ab ii ii | Reserved | |
|
|
| D0 ab ii ii | CMPJUMPUI.G a b ii ii | a > b ? PC = PC + ii ii (unsigned) |
|
|
| D1 ab ii ii | CMPJUMPUI.GE a b ii ii | a >= b ? PC = PC + ii ii (unsigned) |
|
|
| D2 ab ii ii | Reserved | |
|
|
| D3 ab ii ii | Reserved | |
|
|
| D4 ab ii ii | CMPJUMPUI.LE a b ii ii | a <= b ? PC = PC + ii ii (unsigned) |
|
|
| D5 ab ii ii | CMPJUMPUI.L a b ii ii | a < b ? PC = PC + ii ii (unsigned) |
|
|
| D6 ab ii ii | Reserved | |
|
|
| ... | Reserved | |
|
|
| DF ab ii ii | Reserved | |
|
|
|
|
** Reserved Block 3
|
|
At this time these instructions only produce a warning; but could do anything.
|
|
DO NOT USE.
|
|
| Hex | Name |
|
|
|-------------+----------|
|
|
| E0 00 00 00 | Reserved |
|
|
| ... | Reserved |
|
|
| FE FF FF FF | Reserved |
|
|
|
|
** 0OP
|
|
| Hex | Name | Comment |
|
|
|-------------+------------------+----------------------------------------------------------------------------|
|
|
| FF xx xx xx | HALT equivelent. | Although these instructions will all be treated as HALTs. DO NOT USE THEM. |
|
|
| FF FF FF FF | Proper HALT | |
|
|
|
|
* Encoding/Decoding Reference
|
|
** Registers
|
|
There is a direct and consistent relationship between the nybbles and the registers.
|
|
| Hex | Name |
|
|
|-----+-------|
|
|
| 0 | REG0 |
|
|
| 1 | REG1 |
|
|
| 2 | REG2 |
|
|
| 3 | REG3 |
|
|
| 4 | REG4 |
|
|
| 5 | REG5 |
|
|
| 6 | REG6 |
|
|
| 7 | REG7 |
|
|
| 8 | REG8 |
|
|
| 9 | REG9 |
|
|
| A | REG10 |
|
|
| B | REG11 |
|
|
| C | REG12 |
|
|
| D | REG13 |
|
|
| E | REG14 |
|
|
| F | REG15 |
|