2018-08-16 09:13:23 +01:00
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/*
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2019-02-22 11:14:49 +00:00
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* Copyright (c) 2018-2019, Arm Limited. All rights reserved.
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2018-08-16 09:13:23 +01:00
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLATFORM_DEF_H
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#define PLATFORM_DEF_H
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2018-12-14 00:18:21 +00:00
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#include <lib/utils_def.h>
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2018-08-16 09:13:23 +01:00
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#include <sgi_base_platform_def.h>
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#define PLAT_ARM_CLUSTER_COUNT 2
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#define CSS_SGI_MAX_CPUS_PER_CLUSTER 8
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#define CSS_SGI_MAX_PE_PER_CPU 2
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#define PLAT_CSS_MHU_BASE UL(0x45400000)
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2019-03-07 02:23:42 +00:00
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#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
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2018-08-16 09:13:23 +01:00
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/* Base address of DMC-620 instances */
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2019-02-22 11:14:49 +00:00
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#define RDE1EDGE_DMC620_BASE0 UL(0x4e000000)
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#define RDE1EDGE_DMC620_BASE1 UL(0x4e100000)
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2018-08-16 09:13:23 +01:00
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#define PLAT_MAX_PWR_LVL ARM_PWR_LVL2
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#define CSS_SYSTEM_PWR_DMN_LVL ARM_PWR_LVL3
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2019-06-21 17:07:13 +01:00
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/*
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* Physical and virtual address space limits for MMU in AARCH64 & AARCH32 modes
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*/
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2019-07-09 22:02:43 +01:00
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#ifdef __aarch64__
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2019-06-21 17:07:13 +01:00
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 36)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 36)
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#else
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
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#endif
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2018-08-16 09:13:23 +01:00
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#endif /* PLATFORM_DEF_H */
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