2015-05-19 12:18:04 +01:00
|
|
|
#
|
2017-03-06 17:15:15 +00:00
|
|
|
# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
|
2015-05-19 12:18:04 +01:00
|
|
|
#
|
|
|
|
# Redistribution and use in source and binary forms, with or without
|
|
|
|
# modification, are permitted provided that the following conditions are met:
|
|
|
|
#
|
|
|
|
# Redistributions of source code must retain the above copyright notice, this
|
|
|
|
# list of conditions and the following disclaimer.
|
|
|
|
#
|
|
|
|
# Redistributions in binary form must reproduce the above copyright notice,
|
|
|
|
# this list of conditions and the following disclaimer in the documentation
|
|
|
|
# and/or other materials provided with the distribution.
|
|
|
|
#
|
|
|
|
# Neither the name of ARM nor the names of its contributors may be used
|
|
|
|
# to endorse or promote products derived from this software without specific
|
|
|
|
# prior written permission.
|
|
|
|
#
|
|
|
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
|
|
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
|
|
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
|
|
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
|
|
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
|
|
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
|
|
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
|
|
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
|
|
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
|
|
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
|
|
# POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
#
|
|
|
|
|
2016-09-01 22:59:32 +01:00
|
|
|
TZDRAM_BASE := 0xFF800000
|
2015-05-19 12:18:04 +01:00
|
|
|
$(eval $(call add_define,TZDRAM_BASE))
|
|
|
|
|
|
|
|
ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT := 1
|
|
|
|
$(eval $(call add_define,ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT))
|
|
|
|
|
2015-07-16 05:16:28 +01:00
|
|
|
PLATFORM_CLUSTER_COUNT := 2
|
2015-05-19 12:18:04 +01:00
|
|
|
$(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
|
|
|
|
|
2015-07-16 05:16:28 +01:00
|
|
|
PLATFORM_MAX_CPUS_PER_CLUSTER := 4
|
2015-05-19 12:18:04 +01:00
|
|
|
$(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
|
|
|
|
|
2015-09-09 06:59:24 +01:00
|
|
|
MAX_XLAT_TABLES := 3
|
|
|
|
$(eval $(call add_define,MAX_XLAT_TABLES))
|
|
|
|
|
|
|
|
MAX_MMAP_REGIONS := 8
|
|
|
|
$(eval $(call add_define,MAX_MMAP_REGIONS))
|
|
|
|
|
2015-07-21 07:23:35 +01:00
|
|
|
BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
|
|
|
|
lib/cpus/aarch64/cortex_a57.S \
|
2015-08-25 12:31:06 +01:00
|
|
|
${COMMON_DIR}/drivers/flowctrl/flowctrl.c \
|
2015-09-18 06:51:22 +01:00
|
|
|
${COMMON_DIR}/drivers/memctrl/memctrl_v1.c \
|
2015-07-21 07:23:35 +01:00
|
|
|
${SOC_DIR}/plat_psci_handlers.c \
|
|
|
|
${SOC_DIR}/plat_setup.c \
|
2015-05-19 12:18:04 +01:00
|
|
|
${SOC_DIR}/plat_secondary.c
|
|
|
|
|
2017-03-06 17:15:15 +00:00
|
|
|
# Enable workarounds for selected Cortex-A57 erratas.
|
|
|
|
A57_DISABLE_NON_TEMPORAL_HINT := 1
|
|
|
|
ERRATA_A57_826974 := 1
|
|
|
|
ERRATA_A57_826977 := 1
|
|
|
|
ERRATA_A57_828024 := 1
|
|
|
|
ERRATA_A57_829520 := 1
|
|
|
|
ERRATA_A57_833471 := 1
|
2015-07-16 05:16:28 +01:00
|
|
|
|
2017-03-06 17:15:15 +00:00
|
|
|
# Enable workarounds for selected Cortex-A53 erratas.
|
|
|
|
A53_DISABLE_NON_TEMPORAL_HINT := 1
|
|
|
|
ERRATA_A53_826319 := 1
|
|
|
|
ERRATA_A53_836870 := 1
|