2015-05-19 12:18:04 +01:00
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/*
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2017-03-29 22:57:29 +01:00
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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2019-06-17 19:45:11 +01:00
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* Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
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2015-05-19 12:18:04 +01:00
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*
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2017-05-03 09:38:09 +01:00
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* SPDX-License-Identifier: BSD-3-Clause
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2015-05-19 12:18:04 +01:00
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*/
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2018-11-08 10:20:19 +00:00
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#ifndef MEMCTRL_H
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#define MEMCTRL_H
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2015-05-19 12:18:04 +01:00
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void tegra_memctrl_setup(void);
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2016-03-03 21:28:10 +00:00
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void tegra_memctrl_restore_settings(void);
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2015-05-19 12:18:04 +01:00
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void tegra_memctrl_tzdram_setup(uint64_t phys_base, uint32_t size_in_bytes);
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2015-06-10 09:34:32 +01:00
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void tegra_memctrl_videomem_setup(uint64_t phys_base, uint32_t size_in_bytes);
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2017-03-29 22:57:29 +01:00
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void tegra_memctrl_disable_ahb_redirection(void);
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2017-08-21 08:01:53 +01:00
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void tegra_memctrl_clear_pending_interrupts(void);
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2015-05-19 12:18:04 +01:00
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2018-11-08 10:20:19 +00:00
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#endif /* MEMCTRL_H */
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