2014-08-14 16:19:29 +01:00
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#
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2018-03-26 16:46:01 +01:00
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# Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
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2014-08-14 16:19:29 +01:00
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#
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2017-05-03 09:38:09 +01:00
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# SPDX-License-Identifier: BSD-3-Clause
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2014-08-14 16:19:29 +01:00
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#
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2014-09-22 14:13:34 +01:00
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# Cortex A57 specific optimisation to skip L1 cache flush when
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# cluster is powered down.
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SKIP_A57_L1_FLUSH_PWR_DWN ?=0
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2016-01-13 14:57:38 +00:00
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# Flag to disable the cache non-temporal hint.
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# It is enabled by default.
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A53_DISABLE_NON_TEMPORAL_HINT ?=1
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# Flag to disable the cache non-temporal hint.
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# It is enabled by default.
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A57_DISABLE_NON_TEMPORAL_HINT ?=1
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2017-11-30 14:53:53 +00:00
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WORKAROUND_CVE_2017_5715 ?=1
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2018-04-05 14:38:26 +01:00
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WORKAROUND_CVE_2018_3639 ?=1
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2018-05-16 11:36:14 +01:00
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DYNAMIC_WORKAROUND_CVE_2018_3639 ?=0
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2017-11-30 14:53:53 +00:00
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2014-09-22 14:13:34 +01:00
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# Process SKIP_A57_L1_FLUSH_PWR_DWN flag
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$(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN))
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$(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN))
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2016-01-13 14:57:38 +00:00
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# Process A53_DISABLE_NON_TEMPORAL_HINT flag
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$(eval $(call assert_boolean,A53_DISABLE_NON_TEMPORAL_HINT))
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$(eval $(call add_define,A53_DISABLE_NON_TEMPORAL_HINT))
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# Process A57_DISABLE_NON_TEMPORAL_HINT flag
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$(eval $(call assert_boolean,A57_DISABLE_NON_TEMPORAL_HINT))
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$(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT))
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2017-11-30 14:53:53 +00:00
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# Process WORKAROUND_CVE_2017_5715 flag
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$(eval $(call assert_boolean,WORKAROUND_CVE_2017_5715))
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$(eval $(call add_define,WORKAROUND_CVE_2017_5715))
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2014-09-22 14:13:34 +01:00
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2018-04-05 14:38:26 +01:00
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# Process WORKAROUND_CVE_2018_3639 flag
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$(eval $(call assert_boolean,WORKAROUND_CVE_2018_3639))
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$(eval $(call add_define,WORKAROUND_CVE_2018_3639))
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2018-05-16 11:36:14 +01:00
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$(eval $(call assert_boolean,DYNAMIC_WORKAROUND_CVE_2018_3639))
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$(eval $(call add_define,DYNAMIC_WORKAROUND_CVE_2018_3639))
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ifneq (${DYNAMIC_WORKAROUND_CVE_2018_3639},0)
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ifeq (${WORKAROUND_CVE_2018_3639},0)
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$(error "Error: WORKAROUND_CVE_2018_3639 must be 1 if DYNAMIC_WORKAROUND_CVE_2018_3639 is 1")
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endif
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endif
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2016-04-14 12:59:42 +01:00
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# CPU Errata Build flags.
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# These should be enabled by the platform if the erratum workaround needs to be
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# applied.
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2014-08-14 16:19:29 +01:00
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2016-04-14 12:59:42 +01:00
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# Flag to apply erratum 826319 workaround during reset. This erratum applies
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# only to revision <= r0p2 of the Cortex A53 cpu.
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2015-07-29 13:55:31 +01:00
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ERRATA_A53_826319 ?=0
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2017-06-19 15:38:02 +01:00
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# Flag to apply erratum 835769 workaround at compile and link time. This
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# erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
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# workaround can lead the linker to create "*.stub" sections.
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ERRATA_A53_835769 ?=0
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2016-04-14 12:59:42 +01:00
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# Flag to apply erratum 836870 workaround during reset. This erratum applies
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# only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this
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2017-02-15 17:38:43 +00:00
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# erratum workaround is enabled by default in hardware.
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2015-07-29 13:55:31 +01:00
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ERRATA_A53_836870 ?=0
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2017-06-19 15:38:02 +01:00
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# Flag to apply erratum 843419 workaround at link time.
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# This erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
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# workaround could lead the linker to emit "*.stub" sections which are 4kB
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# aligned.
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ERRATA_A53_843419 ?=0
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2016-10-06 16:54:53 +01:00
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# Flag to apply errata 855873 during reset. This errata applies to all
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# revisions of the Cortex A53 CPU, but this firmware workaround only works
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# for revisions r0p3 and higher. Earlier revisions are taken care
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# of by the rich OS.
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ERRATA_A53_855873 ?=0
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2016-04-14 12:59:42 +01:00
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# Flag to apply erratum 806969 workaround during reset. This erratum applies
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# only to revision r0p0 of the Cortex A57 cpu.
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2014-08-14 16:19:29 +01:00
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ERRATA_A57_806969 ?=0
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2017-02-24 11:39:22 +00:00
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# Flag to apply erratum 813419 workaround during reset. This erratum applies
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# only to revision r0p0 of the Cortex A57 cpu.
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ERRATA_A57_813419 ?=0
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2016-04-14 12:59:42 +01:00
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# Flag to apply erratum 813420 workaround during reset. This erratum applies
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# only to revision r0p0 of the Cortex A57 cpu.
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2014-08-14 16:19:29 +01:00
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ERRATA_A57_813420 ?=0
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2016-04-14 13:32:31 +01:00
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# Flag to apply erratum 826974 workaround during reset. This erratum applies
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# only to revision <= r1p1 of the Cortex A57 cpu.
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ERRATA_A57_826974 ?=0
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2016-04-14 14:24:13 +01:00
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# Flag to apply erratum 826977 workaround during reset. This erratum applies
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# only to revision <= r1p1 of the Cortex A57 cpu.
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ERRATA_A57_826977 ?=0
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2016-04-14 14:04:48 +01:00
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# Flag to apply erratum 828024 workaround during reset. This erratum applies
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# only to revision <= r1p1 of the Cortex A57 cpu.
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ERRATA_A57_828024 ?=0
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2016-04-14 14:18:07 +01:00
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# Flag to apply erratum 829520 workaround during reset. This erratum applies
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# only to revision <= r1p2 of the Cortex A57 cpu.
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ERRATA_A57_829520 ?=0
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2016-04-21 11:10:52 +01:00
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# Flag to apply erratum 833471 workaround during reset. This erratum applies
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# only to revision <= r1p2 of the Cortex A57 cpu.
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ERRATA_A57_833471 ?=0
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2017-08-02 16:35:04 +01:00
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# Flag to apply erratum 855972 workaround during reset. This erratum applies
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# only to revision <= r1p3 of the Cortex A57 cpu.
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ERRATA_A57_859972 ?=0
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2017-08-02 18:33:41 +01:00
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# Flag to apply erratum 855971 workaround during reset. This erratum applies
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# only to revision <= r0p3 of the Cortex A72 cpu.
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ERRATA_A72_859971 ?=0
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2018-03-26 16:46:01 +01:00
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# Flag to apply T32 CLREX workaround during reset. This erratum applies
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# only to r0p0 and r1p0 of the Ares cpu.
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ERRATA_ARES_1043202 ?=1
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2015-07-29 13:55:31 +01:00
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# Process ERRATA_A53_826319 flag
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$(eval $(call assert_boolean,ERRATA_A53_826319))
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$(eval $(call add_define,ERRATA_A53_826319))
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2017-06-19 15:38:02 +01:00
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# Process ERRATA_A53_835769 flag
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$(eval $(call assert_boolean,ERRATA_A53_835769))
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$(eval $(call add_define,ERRATA_A53_835769))
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2015-07-29 13:55:31 +01:00
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# Process ERRATA_A53_836870 flag
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$(eval $(call assert_boolean,ERRATA_A53_836870))
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$(eval $(call add_define,ERRATA_A53_836870))
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2017-06-19 15:38:02 +01:00
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# Process ERRATA_A53_843419 flag
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$(eval $(call assert_boolean,ERRATA_A53_843419))
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$(eval $(call add_define,ERRATA_A53_843419))
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2016-10-06 16:54:53 +01:00
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# Process ERRATA_A53_855873 flag
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$(eval $(call assert_boolean,ERRATA_A53_855873))
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$(eval $(call add_define,ERRATA_A53_855873))
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2014-08-14 16:19:29 +01:00
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# Process ERRATA_A57_806969 flag
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$(eval $(call assert_boolean,ERRATA_A57_806969))
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$(eval $(call add_define,ERRATA_A57_806969))
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2017-02-24 11:39:22 +00:00
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# Process ERRATA_A57_813419 flag
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$(eval $(call assert_boolean,ERRATA_A57_813419))
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$(eval $(call add_define,ERRATA_A57_813419))
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2014-08-14 16:19:29 +01:00
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# Process ERRATA_A57_813420 flag
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$(eval $(call assert_boolean,ERRATA_A57_813420))
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$(eval $(call add_define,ERRATA_A57_813420))
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2016-04-14 13:32:31 +01:00
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# Process ERRATA_A57_826974 flag
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$(eval $(call assert_boolean,ERRATA_A57_826974))
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$(eval $(call add_define,ERRATA_A57_826974))
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2016-04-14 14:04:48 +01:00
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2016-04-14 14:24:13 +01:00
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# Process ERRATA_A57_826977 flag
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$(eval $(call assert_boolean,ERRATA_A57_826977))
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$(eval $(call add_define,ERRATA_A57_826977))
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2016-04-14 14:04:48 +01:00
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# Process ERRATA_A57_828024 flag
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$(eval $(call assert_boolean,ERRATA_A57_828024))
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$(eval $(call add_define,ERRATA_A57_828024))
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2016-04-14 14:18:07 +01:00
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# Process ERRATA_A57_829520 flag
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$(eval $(call assert_boolean,ERRATA_A57_829520))
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$(eval $(call add_define,ERRATA_A57_829520))
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2016-04-21 11:10:52 +01:00
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# Process ERRATA_A57_833471 flag
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$(eval $(call assert_boolean,ERRATA_A57_833471))
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$(eval $(call add_define,ERRATA_A57_833471))
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2017-06-19 15:38:02 +01:00
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2017-08-02 16:35:04 +01:00
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# Process ERRATA_A57_859972 flag
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$(eval $(call assert_boolean,ERRATA_A57_859972))
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$(eval $(call add_define,ERRATA_A57_859972))
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2017-08-02 18:33:41 +01:00
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# Process ERRATA_A72_859971 flag
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$(eval $(call assert_boolean,ERRATA_A72_859971))
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$(eval $(call add_define,ERRATA_A72_859971))
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2018-03-26 16:46:01 +01:00
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# Process ERRATA_ARES_1043202 flag
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$(eval $(call assert_boolean,ERRATA_ARES_1043202))
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$(eval $(call add_define,ERRATA_ARES_1043202))
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2017-06-19 15:38:02 +01:00
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# Errata build flags
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ifneq (${ERRATA_A53_843419},0)
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2017-06-22 14:44:48 +01:00
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TF_LDFLAGS_aarch64 += --fix-cortex-a53-843419
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2017-06-19 15:38:02 +01:00
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endif
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ifneq (${ERRATA_A53_835769},0)
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TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769
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2017-06-22 14:44:48 +01:00
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TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769
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2017-06-19 15:38:02 +01:00
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endif
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