2015-04-13 07:47:57 +01:00
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/*
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2016-07-11 09:05:23 +01:00
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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2015-04-13 07:47:57 +01:00
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*
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2017-05-03 09:38:09 +01:00
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* SPDX-License-Identifier: BSD-3-Clause
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2015-04-13 07:47:57 +01:00
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*/
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2016-07-11 09:05:23 +01:00
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#include <arch.h>
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2018-12-14 00:18:21 +00:00
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#include <lib/mmio.h>
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2016-07-11 09:05:23 +01:00
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#include <mcucfg.h>
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2015-04-13 07:47:57 +01:00
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2016-07-11 09:05:23 +01:00
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void disable_scu(unsigned long mpidr)
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{
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if (mpidr & MPIDR_CLUSTER_MASK)
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mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp1_miscdbg,
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MP1_ACINACTM);
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else
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mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp0_axi_config,
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MP0_ACINACTM);
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}
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2015-04-13 07:47:57 +01:00
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2016-07-11 09:05:23 +01:00
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void enable_scu(unsigned long mpidr)
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{
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if (mpidr & MPIDR_CLUSTER_MASK)
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mmio_clrbits_32((uintptr_t)&mt6795_mcucfg->mp1_miscdbg,
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MP1_ACINACTM);
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else
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mmio_clrbits_32((uintptr_t)&mt6795_mcucfg->mp0_axi_config,
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MP0_ACINACTM);
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}
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