Merge changes I19e4e7f5,I226b6e33 into integration
* changes: marvell: uart: a3720: Fix macro name for 6th bit of Status Register marvell: uart: a3720: Implement console_a3700_core_getc
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3adf6012f5
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@ -60,14 +60,14 @@ func console_a3700_core_init
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str w3, [x0, #UART_POSSR_REG]
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/*
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* Wait for the TX FIFO to be empty. If wait for 20ms, the TX FIFO is
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* Wait for the TX (THR and TSR) to be empty. If wait for 20ms, the TX FIFO is
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* still not empty, TX FIFO will reset by all means.
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*/
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mov w1, #20 /* max time out 20ms */
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2:
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/* Check whether TX FIFO is empty */
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/* Check whether TX (THR and TSR) is empty */
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ldr w3, [x0, #UART_STATUS_REG]
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and w3, w3, #UARTLSR_TXFIFOEMPTY
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and w3, w3, #UARTLSR_TXEMPTY
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cmp w3, #0
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b.ne 4f
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@ -196,14 +196,23 @@ endfunc console_a3700_putc
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* int console_a3700_core_getc(void)
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* Function to get a character from the console.
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* It returns the character grabbed on success
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* or -1 on error.
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* or -1 if no character is available.
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* In : w0 - console base address
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* Out : return -1 on error else return character.
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* Out : w0 - character if available, else -1
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* Clobber list : x0, x1
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* ---------------------------------------------
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*/
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func console_a3700_core_getc
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mov w0, #-1
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/* Check if there is a pending character */
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ldr w1, [x0, #UART_STATUS_REG]
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and w1, w1, #UARTLSR_RXRDY
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cmp w1, #UARTLSR_RXRDY
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b.ne getc_no_char
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ldr w0, [x0, #UART_RX_REG]
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and w0, w0, #0xff
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ret
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getc_no_char:
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mov w0, #ERROR_NO_PENDING_CHAR
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ret
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endfunc console_a3700_core_getc
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@ -232,10 +241,10 @@ endfunc console_a3700_getc
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* ---------------------------------------------
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*/
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func console_a3700_core_flush
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/* Wait for the TX FIFO to be empty */
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/* Wait for the TX (THR and TSR) to be empty */
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1: ldr w1, [x0, #UART_STATUS_REG]
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and w1, w1, #UARTLSR_TXFIFOEMPTY
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cmp w1, #UARTLSR_TXFIFOEMPTY
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and w1, w1, #UARTLSR_TXEMPTY
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cmp w1, #UARTLSR_TXEMPTY
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b.ne 1b
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ret
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endfunc console_a3700_core_flush
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@ -48,11 +48,12 @@
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/* Line Status Register bits */
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#define UARTLSR_TXFIFOFULL (1 << 11) /* Tx Fifo Full */
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#define UARTLSR_TXEMPTY (1 << 6) /* Tx Empty */
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#define UARTLSR_RXRDY (1 << 4) /* Rx Ready */
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/* UART Control Register bits */
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#define UART_CTRL_RXFIFO_RESET (1 << 14)
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#define UART_CTRL_TXFIFO_RESET (1 << 15)
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#define UARTLSR_TXFIFOEMPTY (1 << 6)
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#ifndef __ASSEMBLER__
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