Tegra: enable 'signed-comparison' compilation warning/errors
This patch enables the 'sign-compare' flag, to enable warning/errors for comparisons between signed/unsigned variables. The warning has been enabled for all the Tegra platforms, to start with. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
This commit is contained in:
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dfe30efb1d
commit
6311f63de0
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@ -36,15 +36,16 @@ uintptr_t handle_runtime_svc(uint32_t smc_fid,
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unsigned int flags)
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unsigned int flags)
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{
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{
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u_register_t x1, x2, x3, x4;
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u_register_t x1, x2, x3, x4;
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int index, idx;
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int index;
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unsigned int idx;
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const rt_svc_desc_t *rt_svc_descs;
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const rt_svc_desc_t *rt_svc_descs;
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assert(handle);
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assert(handle);
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idx = get_unique_oen_from_smc_fid(smc_fid);
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idx = get_unique_oen_from_smc_fid(smc_fid);
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assert(idx >= 0 && idx < MAX_RT_SVCS);
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assert(idx < MAX_RT_SVCS);
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index = rt_svc_descs_indices[idx];
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index = rt_svc_descs_indices[idx];
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if (index < 0 || index >= RT_SVC_DECS_NUM)
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if (index < 0 || index >= (int)RT_SVC_DECS_NUM)
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SMC_RET1(handle, SMC_UNK);
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SMC_RET1(handle, SMC_UNK);
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rt_svc_descs = (rt_svc_desc_t *) RT_SVC_DESCS_START;
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rt_svc_descs = (rt_svc_desc_t *) RT_SVC_DESCS_START;
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@ -89,7 +90,8 @@ static int32_t validate_rt_svc_desc(const rt_svc_desc_t *desc)
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******************************************************************************/
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******************************************************************************/
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void runtime_svc_init(void)
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void runtime_svc_init(void)
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{
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{
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int rc = 0, index, start_idx, end_idx;
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int rc = 0;
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unsigned int index, start_idx, end_idx;
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/* Assert the number of descriptors detected are less than maximum indices */
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/* Assert the number of descriptors detected are less than maximum indices */
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assert((RT_SVC_DESCS_END >= RT_SVC_DESCS_START) &&
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assert((RT_SVC_DESCS_END >= RT_SVC_DESCS_START) &&
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@ -60,7 +60,7 @@ int errata_needs_reporting(spinlock_t *lock, uint32_t *reported)
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* Applied: INFO
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* Applied: INFO
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* Not applied: VERBOSE
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* Not applied: VERBOSE
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*/
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*/
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void errata_print_msg(int status, const char *cpu, const char *id)
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void errata_print_msg(unsigned int status, const char *cpu, const char *id)
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{
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{
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/* Errata status strings */
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/* Errata status strings */
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static const char *const errata_status_str[] = {
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static const char *const errata_status_str[] = {
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@ -332,7 +332,7 @@ void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
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unsigned int node_index[])
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unsigned int node_index[])
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{
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{
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unsigned int parent_node = psci_cpu_pd_nodes[cpu_idx].parent_node;
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unsigned int parent_node = psci_cpu_pd_nodes[cpu_idx].parent_node;
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int i;
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unsigned int i;
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for (i = PSCI_CPU_PWR_LVL + 1; i <= end_lvl; i++) {
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for (i = PSCI_CPU_PWR_LVL + 1; i <= end_lvl; i++) {
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*node_index++ = parent_node;
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*node_index++ = parent_node;
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@ -901,7 +901,7 @@ void psci_print_power_domain_map(void)
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*****************************************************************************/
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*****************************************************************************/
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int psci_secondaries_brought_up(void)
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int psci_secondaries_brought_up(void)
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{
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{
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int idx, n_valid = 0;
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unsigned int idx, n_valid = 0;
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for (idx = 0; idx < ARRAY_SIZE(psci_cpu_pd_nodes); idx++) {
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for (idx = 0; idx < ARRAY_SIZE(psci_cpu_pd_nodes); idx++) {
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if (psci_cpu_pd_nodes[idx].mpidr != PSCI_INVALID_MPIDR)
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if (psci_cpu_pd_nodes[idx].mpidr != PSCI_INVALID_MPIDR)
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@ -209,7 +209,7 @@ int psci_cpu_off(void)
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int psci_affinity_info(u_register_t target_affinity,
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int psci_affinity_info(u_register_t target_affinity,
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unsigned int lowest_affinity_level)
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unsigned int lowest_affinity_level)
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{
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{
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unsigned int target_idx;
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int target_idx;
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/* We dont support level higher than PSCI_CPU_PWR_LVL */
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/* We dont support level higher than PSCI_CPU_PWR_LVL */
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if (lowest_affinity_level > PSCI_CPU_PWR_LVL)
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if (lowest_affinity_level > PSCI_CPU_PWR_LVL)
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@ -19,7 +19,7 @@
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******************************************************************************/
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******************************************************************************/
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static void psci_set_power_off_state(psci_power_state_t *state_info)
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static void psci_set_power_off_state(psci_power_state_t *state_info)
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{
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{
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int lvl;
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unsigned int lvl;
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for (lvl = PSCI_CPU_PWR_LVL; lvl <= PLAT_MAX_PWR_LVL; lvl++)
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for (lvl = PSCI_CPU_PWR_LVL; lvl <= PLAT_MAX_PWR_LVL; lvl++)
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state_info->pwr_domain_state[lvl] = PLAT_MAX_OFF_STATE;
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state_info->pwr_domain_state[lvl] = PLAT_MAX_OFF_STATE;
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@ -37,7 +37,7 @@
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*/
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*/
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static int xlat_table_get_index(xlat_ctx_t *ctx, const uint64_t *table)
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static int xlat_table_get_index(xlat_ctx_t *ctx, const uint64_t *table)
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{
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{
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for (int i = 0; i < ctx->tables_num; i++)
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for (unsigned int i = 0; i < ctx->tables_num; i++)
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if (ctx->tables[i] == table)
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if (ctx->tables[i] == table)
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return i;
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return i;
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@ -53,7 +53,7 @@ static int xlat_table_get_index(xlat_ctx_t *ctx, const uint64_t *table)
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/* Returns a pointer to an empty translation table. */
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/* Returns a pointer to an empty translation table. */
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static uint64_t *xlat_table_get_empty(xlat_ctx_t *ctx)
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static uint64_t *xlat_table_get_empty(xlat_ctx_t *ctx)
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{
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{
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for (int i = 0; i < ctx->tables_num; i++)
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for (unsigned int i = 0; i < ctx->tables_num; i++)
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if (ctx->tables_mapped_regions[i] == 0)
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if (ctx->tables_mapped_regions[i] == 0)
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return ctx->tables[i];
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return ctx->tables[i];
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@ -203,7 +203,7 @@ static void xlat_tables_unmap_region(xlat_ctx_t *ctx, mmap_region_t *mm,
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const uintptr_t table_base_va,
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const uintptr_t table_base_va,
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uint64_t *const table_base,
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uint64_t *const table_base,
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const int table_entries,
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const int table_entries,
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const int level)
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const unsigned int level)
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{
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{
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assert(level >= ctx->base_level && level <= XLAT_TABLE_LEVEL_MAX);
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assert(level >= ctx->base_level && level <= XLAT_TABLE_LEVEL_MAX);
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@ -468,7 +468,7 @@ static uintptr_t xlat_tables_map_region(xlat_ctx_t *ctx, mmap_region_t *mm,
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const uintptr_t table_base_va,
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const uintptr_t table_base_va,
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uint64_t *const table_base,
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uint64_t *const table_base,
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const int table_entries,
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const int table_entries,
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const int level)
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const unsigned int level)
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{
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{
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assert(level >= ctx->base_level && level <= XLAT_TABLE_LEVEL_MAX);
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assert(level >= ctx->base_level && level <= XLAT_TABLE_LEVEL_MAX);
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@ -1053,14 +1053,14 @@ void init_xlation_table(xlat_ctx_t *ctx)
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/* All tables must be zeroed before mapping any region. */
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/* All tables must be zeroed before mapping any region. */
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for (int i = 0; i < ctx->base_table_entries; i++)
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for (unsigned int i = 0; i < ctx->base_table_entries; i++)
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ctx->base_table[i] = INVALID_DESC;
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ctx->base_table[i] = INVALID_DESC;
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for (int j = 0; j < ctx->tables_num; j++) {
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for (unsigned int j = 0; j < ctx->tables_num; j++) {
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#if PLAT_XLAT_TABLES_DYNAMIC
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#if PLAT_XLAT_TABLES_DYNAMIC
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ctx->tables_mapped_regions[j] = 0;
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ctx->tables_mapped_regions[j] = 0;
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#endif
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#endif
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for (int i = 0; i < XLAT_TABLE_ENTRIES; i++)
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for (unsigned int i = 0; i < XLAT_TABLE_ENTRIES; i++)
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ctx->tables[j][i] = INVALID_DESC;
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ctx->tables[j][i] = INVALID_DESC;
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}
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}
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@ -52,7 +52,7 @@ typedef struct {
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* null entry.
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* null entry.
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*/
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*/
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mmap_region_t *mmap;
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mmap_region_t *mmap;
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int mmap_num;
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unsigned int mmap_num;
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/*
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/*
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* Array of finer-grain translation tables.
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* Array of finer-grain translation tables.
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@ -60,7 +60,7 @@ typedef struct {
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* contain both level-2 and level-3 entries.
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* contain both level-2 and level-3 entries.
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*/
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*/
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uint64_t (*tables)[XLAT_TABLE_ENTRIES];
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uint64_t (*tables)[XLAT_TABLE_ENTRIES];
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int tables_num;
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unsigned int tables_num;
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/*
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/*
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* Keep track of how many regions are mapped in each table. The base
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* Keep track of how many regions are mapped in each table. The base
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* table can't be unmapped so it isn't needed to keep track of it.
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* table can't be unmapped so it isn't needed to keep track of it.
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int *tables_mapped_regions;
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int *tables_mapped_regions;
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#endif /* PLAT_XLAT_TABLES_DYNAMIC */
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#endif /* PLAT_XLAT_TABLES_DYNAMIC */
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int next_table;
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unsigned int next_table;
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/*
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/*
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* Base translation table. It doesn't need to have the same amount of
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* Base translation table. It doesn't need to have the same amount of
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* entries as the ones used for other levels.
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* entries as the ones used for other levels.
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*/
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*/
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uint64_t *base_table;
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uint64_t *base_table;
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int base_table_entries;
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unsigned int base_table_entries;
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/*
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/*
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* Max Physical and Virtual addresses currently in use by the
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* Max Physical and Virtual addresses currently in use by the
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uintptr_t max_va;
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uintptr_t max_va;
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/* Level of the base translation table. */
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/* Level of the base translation table. */
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int base_level;
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unsigned int base_level;
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/* Set to 1 when the translation tables are initialized. */
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/* Set to 1 when the translation tables are initialized. */
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int initialized;
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unsigned int initialized;
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/*
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/*
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* Bit mask that has to be ORed to the rest of a translation table
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* Bit mask that has to be ORed to the rest of a translation table
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@ -107,7 +107,7 @@ plat_local_state_t tegra_soc_get_target_pwr_state(unsigned int lvl,
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void tegra_get_sys_suspend_power_state(psci_power_state_t *req_state)
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void tegra_get_sys_suspend_power_state(psci_power_state_t *req_state)
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{
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{
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/* all affinities use system suspend state id */
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/* all affinities use system suspend state id */
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for (int i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++)
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for (uint32_t i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++)
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req_state->pwr_domain_state[i] = PSTATE_ID_SOC_POWERDN;
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req_state->pwr_domain_state[i] = PSTATE_ID_SOC_POWERDN;
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}
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}
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@ -34,3 +34,6 @@ include ${SOC_DIR}/platform_${TARGET_SOC}.mk
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# modify BUILD_PLAT to point to SoC specific build directory
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# modify BUILD_PLAT to point to SoC specific build directory
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BUILD_PLAT := ${BUILD_BASE}/${PLAT}/${TARGET_SOC}/${BUILD_TYPE}
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BUILD_PLAT := ${BUILD_BASE}/${PLAT}/${TARGET_SOC}/${BUILD_TYPE}
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# enable signed comparison checks
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CFLAGS += -Wsign-compare
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@ -49,7 +49,7 @@ int32_t tegra_soc_validate_power_state(unsigned int power_state,
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}
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}
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/* Set lower power states to PLAT_MAX_OFF_STATE */
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/* Set lower power states to PLAT_MAX_OFF_STATE */
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for (int i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++)
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for (uint32_t i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++)
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req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
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req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
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/* Set the SYSTEM_SUSPEND state-id */
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/* Set the SYSTEM_SUSPEND state-id */
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@ -291,7 +291,7 @@ int ari_is_sc7_allowed(uint32_t ari_base, uint32_t state, uint32_t wake_time)
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int ari_online_core(uint32_t ari_base, uint32_t core)
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int ari_online_core(uint32_t ari_base, uint32_t core)
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{
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{
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int cpu = read_mpidr() & MPIDR_CPU_MASK;
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uint32_t cpu = read_mpidr() & MPIDR_CPU_MASK;
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int cluster = (read_mpidr() & MPIDR_CLUSTER_MASK) >>
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int cluster = (read_mpidr() & MPIDR_CLUSTER_MASK) >>
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MPIDR_AFFINITY_BITS;
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MPIDR_AFFINITY_BITS;
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int impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK;
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int impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK;
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@ -300,7 +300,7 @@ int ari_online_core(uint32_t ari_base, uint32_t core)
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cpu |= (cluster << 2);
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cpu |= (cluster << 2);
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/* sanity check target core id */
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/* sanity check target core id */
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if ((core >= MCE_CORE_ID_MAX) || (cpu == core)) {
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if ((core >= (uint32_t)MCE_CORE_ID_MAX) || (cpu == core)) {
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ERROR("%s: unsupported core id (%d)\n", __func__, core);
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ERROR("%s: unsupported core id (%d)\n", __func__, core);
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return EINVAL;
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return EINVAL;
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}
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}
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@ -168,11 +168,11 @@ int nvg_is_sc7_allowed(uint32_t ari_base, uint32_t state, uint32_t wake_time)
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int nvg_online_core(uint32_t ari_base, uint32_t core)
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int nvg_online_core(uint32_t ari_base, uint32_t core)
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{
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{
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int cpu = read_mpidr() & MPIDR_CPU_MASK;
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uint32_t cpu = read_mpidr() & MPIDR_CPU_MASK;
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int impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK;
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int impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK;
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/* sanity check code id */
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/* sanity check code id */
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if ((core >= MCE_CORE_ID_MAX) || (cpu == core)) {
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if ((core >= (uint32_t)MCE_CORE_ID_MAX) || (cpu == core)) {
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ERROR("%s: unsupported core id (%d)\n", __func__, core);
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ERROR("%s: unsupported core id (%d)\n", __func__, core);
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return EINVAL;
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return EINVAL;
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}
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}
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@ -256,8 +256,8 @@ int tegra_soc_pwr_domain_power_down_wfi(const psci_power_state_t *target_state)
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int tegra_soc_pwr_domain_on(u_register_t mpidr)
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int tegra_soc_pwr_domain_on(u_register_t mpidr)
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{
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{
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int target_cpu = mpidr & MPIDR_CPU_MASK;
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uint32_t target_cpu = mpidr & MPIDR_CPU_MASK;
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int target_cluster = (mpidr & MPIDR_CLUSTER_MASK) >>
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uint32_t target_cluster = (mpidr & MPIDR_CLUSTER_MASK) >>
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MPIDR_AFFINITY_BITS;
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MPIDR_AFFINITY_BITS;
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if (target_cluster > MPIDR_AFFLVL1) {
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if (target_cluster > MPIDR_AFFLVL1) {
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@ -60,7 +60,7 @@ int32_t tegra_soc_validate_power_state(unsigned int power_state,
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/*
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/*
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* System powerdown request only for afflvl 2
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* System powerdown request only for afflvl 2
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*/
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*/
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for (int i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++)
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for (uint32_t i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++)
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req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
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req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
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req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] =
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req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] =
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@ -37,7 +37,7 @@ tlk_context_t tlk_ctx;
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/*******************************************************************************
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/*******************************************************************************
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* CPU number on which TLK booted up
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* CPU number on which TLK booted up
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******************************************************************************/
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******************************************************************************/
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static int boot_cpu;
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static uint32_t boot_cpu;
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/* TLK UID: RFC-4122 compliant UUID (version-5, sha-1) */
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/* TLK UID: RFC-4122 compliant UUID (version-5, sha-1) */
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DEFINE_SVC_UUID(tlk_uuid,
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DEFINE_SVC_UUID(tlk_uuid,
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