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drivers: marvell: align and extend llc macros 

Make all LLC-related macros to start with the same prefix
Add more LLC control registers definitions
This patch is a preparation step for LLC SRAM support

Change-Id: I0a4f0fc83e8ef35be93dd239a85f2a9f88d1ab19
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
This commit is contained in:
Konstantin Porotchkin 2019-03-25 15:35:41 +02:00 committed by Marcin Wojtas
parent e825176f1c
commit 772aa5ba75
3 changed files with 18 additions and 9 deletions
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6
drivers/marvell/cache_llc.c
View File

@ -31,19 +31,19 @@ void llc_cache_sync(int ap_index)
void llc_flush_all(int ap_index)
{
mmio_write_32(L2X0_CLEAN_INV_WAY(ap_index), LLC_WAY_MASK);
mmio_write_32(LLC_CLEAN_INV_WAY(ap_index), LLC_ALL_WAYS_MASK);
llc_cache_sync(ap_index);
}
void llc_clean_all(int ap_index)
{
mmio_write_32(L2X0_CLEAN_WAY(ap_index), LLC_WAY_MASK);
mmio_write_32(LLC_CLEAN_WAY(ap_index), LLC_ALL_WAYS_MASK);
llc_cache_sync(ap_index);
}
void llc_inv_all(int ap_index)
{
mmio_write_32(L2X0_INV_WAY(ap_index), LLC_WAY_MASK);
mmio_write_32(LLC_INV_WAY(ap_index), LLC_ALL_WAYS_MASK);
llc_cache_sync(ap_index);
}

19
include/drivers/marvell/cache_llc.h
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@ -14,18 +14,27 @@
#define LLC_CTRL(ap) (MVEBU_LLC_BASE(ap) + 0x100)
#define LLC_SYNC(ap) (MVEBU_LLC_BASE(ap) + 0x700)
#define L2X0_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x77C)
#define L2X0_CLEAN_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7BC)
#define L2X0_CLEAN_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7FC)
#define LLC_BANKED_MNT_AHR(ap) (MVEBU_LLC_BASE(ap) + 0x724)
#define LLC_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x77C)
#define LLC_BLK_ALOC(ap) (MVEBU_LLC_BASE(ap) + 0x78c)
#define LLC_CLEAN_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7BC)
#define LLC_CLEAN_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7FC)
#define LLC_TC0_LOCK(ap) (MVEBU_LLC_BASE(ap) + 0x920)
#define MASTER_LLC_CTRL LLC_CTRL(MVEBU_AP0)
#define MASTER_L2X0_INV_WAY L2X0_INV_WAY(MVEBU_AP0)
#define MASTER_LLC_INV_WAY LLC_INV_WAY(MVEBU_AP0)
#define MASTER_LLC_TC0_LOCK LLC_TC0_LOCK(MVEBU_AP0)
#define LLC_CTRL_EN 1
#define LLC_EXCLUSIVE_EN 0x100
#define LLC_WAY_MASK 0xFFFFFFFF
#define LLC_ALL_WAYS_MASK 0xFFFFFFFF
/* AP806/AP807 - 1MB 8-ways LLC */
#define LLC_WAYS 8
#define LLC_WAY_MASK ((1 << LLC_WAYS) - 1)
#define LLC_SIZE (1024 * 1024)
#define LLC_WAY_SIZE (LLC_SIZE / LLC_WAYS)
#ifndef __ASSEMBLER__
void llc_cache_sync(int ap_index);

2
plat/marvell/armada/common/aarch64/marvell_helpers.S
View File

@ -185,7 +185,7 @@ func disable_sram
/* Invalidate all ways */
ldr w1, =LLC_WAY_MASK
ldr x0, =MASTER_L2X0_INV_WAY
ldr x0, =MASTER_LLC_INV_WAY
str w1, [x0]
/* Finally disable LLC */