Merge changes Ic701675c,Ie55e25c8 into integration
* changes: plat: imx8m: Correct the imr mask reg offset plat: imx8m: Keep A53 PLAT on in wait mode(ret)
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a3b500449b
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@ -16,7 +16,7 @@
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#include <imx8m_psci.h>
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#include <plat_imx8.h>
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static uint32_t gpc_imr_offset[] = { 0x30, 0x40, 0x1c0, 0x1d0, };
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static uint32_t gpc_imr_offset[] = { IMR1_CORE0_A53, IMR1_CORE1_A53, IMR1_CORE2_A53, IMR1_CORE3_A53, };
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#pragma weak imx_set_cpu_pwr_off
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#pragma weak imx_set_cpu_pwr_on
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@ -133,14 +133,12 @@ void imx_set_cluster_powerdown(unsigned int last_core, uint8_t power_state)
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val = mmio_read_32(IMX_GPC_BASE + LPCR_A53_AD);
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val &= ~EN_L2_WFI_PDN;
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/* L2 cache memory is on in WAIT mode */
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if (is_local_state_off(power_state))
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if (is_local_state_off(power_state)) {
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val |= (L2PGE | EN_PLAT_PDN);
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else
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val |= EN_PLAT_PDN;
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imx_a53_plat_slot_config(true);
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}
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mmio_write_32(IMX_GPC_BASE + LPCR_A53_AD, val);
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imx_a53_plat_slot_config(true);
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} else {
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/* clear the slot and ack for cluster power down */
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imx_a53_plat_slot_config(false);
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@ -192,7 +192,7 @@ void __dead2 imx_pwr_domain_pwr_down_wfi(const psci_power_state_t *target_state)
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* drived by the 32K OSC, so delay 30us to make sure the counter
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* is really running.
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*/
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if (!is_local_state_run(CLUSTER_PWR_STATE(target_state))) {
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if (is_local_state_off(CLUSTER_PWR_STATE(target_state))) {
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imx_set_rbc_count();
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udelay(30);
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}
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@ -124,4 +124,6 @@
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#define VPU_G2_PGC 0xf00
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#define VPU_H1_PGC 0xf40
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#define IRQ_IMR_NUM U(4)
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#endif /* GPC_REG_H */
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@ -106,4 +106,6 @@
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#define GPUMIX_PGC 0xdc0
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#define DISPMIX_PGC 0xe80
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#define IRQ_IMR_NUM U(4)
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#endif /* GPC_REG_H */
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@ -146,4 +146,6 @@
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#define MEDIAMIX_ISPDWP_PGC 0xf80
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#define DDRMIX_PGC 0xfc0
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#define IRQ_IMR_NUM U(5)
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#endif /* GPC_REG_H */
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@ -84,4 +84,6 @@
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#define MASTER1_MAPPING BIT(1)
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#define MASTER2_MAPPING BIT(2)
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#define IRQ_IMR_NUM U(4)
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#endif /* GPC_REG_H */
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@ -25,7 +25,6 @@
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#define SLTx_CFG(n) ((SLT0_CFG + ((n) * 4)))
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#define SLT_COREx_PUP(core_id) (0x2 << ((core_id) * 2))
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#define IRQ_IMR_NUM 4
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#define IMR_MASK_ALL 0xffffffff
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#define IMX_PD_DOMAIN(name, on) \
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