feat(nxp/common/io): add ifc nor and nand as io devices

Added IFC Nor and NAN flash as boot IO devices.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie1b87174d9c08d4e32138066b007fef6f8e3c5dd
This commit is contained in:
Jiafei Pan 2021-10-21 16:30:12 +08:00
parent 28279cf2c1
commit b759727f59
2 changed files with 41 additions and 3 deletions

View File

@ -32,6 +32,7 @@
#define NXP_SFP_ADDR 0x01E80000 #define NXP_SFP_ADDR 0x01E80000
#define NXP_RCPM_ADDR 0x01EE2000 #define NXP_RCPM_ADDR 0x01EE2000
#define NXP_CSU_ADDR 0x01510000 #define NXP_CSU_ADDR 0x01510000
#define NXP_IFC_ADDR 0x01530000
#define NXP_SCFG_ADDR 0x01570000 #define NXP_SCFG_ADDR 0x01570000
#define NXP_DCSR_ADDR 0x20000000 #define NXP_DCSR_ADDR 0x20000000
#define NXP_DCSR_DCFG_ADDR (NXP_DCSR_ADDR + 0x00140000) #define NXP_DCSR_DCFG_ADDR (NXP_DCSR_ADDR + 0x00140000)

View File

@ -1,5 +1,5 @@
/* /*
* Copyright 2018-2020 NXP * Copyright 2018-2021 NXP
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
* *
@ -19,6 +19,12 @@
#ifdef FLEXSPI_NOR_BOOT #ifdef FLEXSPI_NOR_BOOT
#include <flexspi_nor.h> #include <flexspi_nor.h>
#endif #endif
#if defined(NAND_BOOT)
#include <ifc_nand.h>
#endif
#if defined(NOR_BOOT)
#include <ifc_nor.h>
#endif
#if defined(QSPI_BOOT) #if defined(QSPI_BOOT)
#include <qspi.h> #include <qspi.h>
#endif #endif
@ -263,7 +269,7 @@ int open_backend(const uintptr_t spec)
return result; return result;
} }
#if defined(SD_BOOT) || defined(EMMC_BOOT) #if defined(SD_BOOT) || defined(EMMC_BOOT) || defined(NAND_BOOT)
static int plat_io_block_setup(size_t fip_offset, uintptr_t block_dev_spec) static int plat_io_block_setup(size_t fip_offset, uintptr_t block_dev_spec)
{ {
int io_result; int io_result;
@ -282,7 +288,7 @@ static int plat_io_block_setup(size_t fip_offset, uintptr_t block_dev_spec)
} }
#endif #endif
#if defined(FLEXSPI_NOR_BOOT) || defined(QSPI_BOOT) #if defined(FLEXSPI_NOR_BOOT) || defined(QSPI_BOOT) || defined(NOR_BOOT)
static int plat_io_memmap_setup(size_t fip_offset) static int plat_io_memmap_setup(size_t fip_offset)
{ {
int io_result; int io_result;
@ -401,20 +407,51 @@ int emmc_io_setup(void)
int ifc_nor_io_setup(void) int ifc_nor_io_setup(void)
{ {
#if defined(NOR_BOOT)
int ret;
ret = ifc_nor_init(NXP_NOR_FLASH_ADDR,
NXP_NOR_FLASH_SIZE);
if (ret != 0) {
return ret;
}
return plat_io_memmap_setup(NXP_NOR_FLASH_ADDR + PLAT_FIP_OFFSET);
#else
ERROR("NOR driver not present. Check your BUILD\n"); ERROR("NOR driver not present. Check your BUILD\n");
/* Should never reach here */ /* Should never reach here */
assert(false); assert(false);
return -1; return -1;
#endif
} }
int ifc_nand_io_setup(void) int ifc_nand_io_setup(void)
{ {
#if defined(NAND_BOOT)
uintptr_t block_dev_spec;
int ret;
ret = ifc_nand_init(&block_dev_spec,
NXP_IFC_REGION_ADDR,
NXP_IFC_ADDR,
NXP_IFC_SRAM_BUFFER_SIZE,
NXP_SD_BLOCK_BUF_ADDR,
NXP_SD_BLOCK_BUF_SIZE);
if (ret != 0) {
return ret;
}
return plat_io_block_setup(PLAT_FIP_OFFSET, block_dev_spec);
#else
ERROR("NAND driver not present. Check your BUILD\n"); ERROR("NAND driver not present. Check your BUILD\n");
/* Should never reach here */ /* Should never reach here */
assert(false); assert(false);
return -1; return -1;
#endif
} }
int ls_flexspi_nor_io_setup(void) int ls_flexspi_nor_io_setup(void)