Commit Graph

7 Commits

Author SHA1 Message Date
Yann Gautier 277d6af561 fdts: stm32mp1: realign device tree with kernel
There is one dtsi file per SoC version:
- STM32MP151: common part for all version, Single Cortex-A7
- STM32MP153: Dual Cortex-A7
- STM32MP157: + GPU and DSI, but not needed for TF-A

The STM32MP15xC include a cryptography peripheral, add it in a dedicated
file.

There are 4 packages available, for which  the IOs number change. Have one
file for each package. The 2 packages AB and AD are added.

STM32157A-DK1 and STM32MP157C-DK2 share most of their features, a common
dkx file is then created.

Some reordering is done in other files, and realign with kernel DT files.

The DDR files are generated with our internal tool, no changes in the
registers values.

Change-Id: I9f2ef00306310abe34b94c2f10fc7a77a10493d1
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-24 09:07:57 +02:00
Antonio Borneo 2dc9fe70da fdts: stm32mp1: move FDCAN to PLL4_R
LTDC modifies the clock frequency to adapt it to the display. Such
frequency change is not detected by the FDCAN driver that instead
caches the value at probe and pretends to use it later.

This change fixes the issue by moving the FDCAN to PLL4_R,
leaving the LTDC alone on PLL4_Q.

Signed-off-by: Antonio Borneo <antonio.borneo@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I8230868b2b5fd6deb6e3f9dc3911030d8d484c58
2019-10-03 11:17:40 +02:00
Yann Gautier f237822f0b fdts: stm32mp1: realign device tree files with internal devs
Update DDR parameters to version 1.45.
Remove useless sdmmc1_dir_pins_b node.
Add USART3 and UART7 nodes.
Correct a PMIC value for USB regulator.
Add TIMER12, TIMER15, CRYP, HASH and USBOTG_HS nodes.
Update DTSI file for SDMMC compatible, but overwrite it with the former
name.
Move BSEC board_id node to boards DTS files, as this OTP is specific to
STMicroelectronics boards.

Change-Id: If4d2fe090c6a8368afe8e21e5ac70579911d3939
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-06-17 14:03:51 +02:00
Yann Gautier f33b2433f5 stm32mp1: add general SYSCFG management
The system configuration controller is mainly used to manage
the compensation cell and other IOs and system related settings.

The SYSCFG driver is in charge of configuring masters on the interconnect,
IO compensation, low voltage boards, or pull-ups for boot pins.
All other configurations should be handled in Linux drivers requiring it.

Device tree files are also updated to manage vdd-supply regulator.

Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-06-17 14:03:51 +02:00
Yann Gautier 83f62c877b fdts: stm32mp1: add bsec node
This node is added in a new file stm32mp157c-security.dtsi.
This node includes OTPs that should be shadowed and made readable
to non secure world.
Explicitly add status and secure-status, as these OTPs are accessible
by secure and non-secure world.

The stgen node is also moved to this file.

Change-Id: I3c89a01588d2e411fecfc44997e1c5df2fc37cad
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-03-11 10:09:34 +01:00
Yann Gautier b053a22e8a stm32mp1: add minimal support for co-processor Cortex-M4
STM32MP1 chip embeds a dual Cortex-A7 and a Cortex-M4.
The support for Cortex-M4 clocks is added when configuring the clock tree.
Some minimal security features to allow communications between A7 and M4
are also added.

Change-Id: I60417e244a476f60a2758f4969700b2684056665
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-02-20 17:34:21 +01:00
Yann Gautier 6c1e71e1a1 stm32mp1: introduce STM32MP1 discovery boards
Add the device tree files to support the 2 discovery boards: DK1 & DK2.

Change-Id: I90b4797dc69bd0aab1b643a72c932ead48a03c1f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-02-14 11:20:23 +01:00