Commit Graph

18 Commits

Author SHA1 Message Date
Biwen Li 9755fd2ec2 feat(nxp-gic): add some macros definition for gicv3
Add macros as follows,
    - GICD_ISENABLER_1
    - GICD_ISENABLER_3
    - GICD_ICENABLER_1
    - GICD_ICENABLER_3

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia522ab4bc496d9a47613a49829b65db96e2b1279
2022-03-27 23:24:24 +08:00
Jiafei Pan d60364d48e feat(nxp-crypto): add chassis 3 support
Add Chassis 3 support for CAAM driver.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ied26dd3881489a03017a45966888a61a0813492c
2022-03-27 23:24:24 +08:00
Biwen Li df02aeeec6 feat(nxp-dcfg): add Chassis 3 support
Add support for Chassis 3.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I85cf68d4f1db81bf344e34dce13799ae173aa23a
2022-03-27 23:24:24 +08:00
Jiafei Pan fa7fdfabf0 fix(nxp-crypto): refine code to avoid hang issue for some of toolchain
bitfield structure maybe has strict-aliasing issue for some compiler,
for example the old code has hang issue for yocto 3.4 toolchain, so
refine the code to avoid to use bitfield structure.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6b6d7597311240dd6d6b8ca4ce508c69332f9c68
2022-02-18 12:03:16 +08:00
Jiafei Pan 1b29fe534b feat(nxp/driver/dcfg): add some macro definition
Added offset for register DEVDISR2 and DEVDISR3, added
bit definiton for PORSR1_RCW, and some macro for SVR.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie49392b89280c6c2c3510fcb4c85d827a1efdac0
2022-01-20 23:38:03 +08:00
Jiafei Pan de9e57ff1f feat(nxp/driver/tzc380): add tzc380 platform driver support
Added TZC380 platform driver support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Id0aa6cb64fa7af79dd44e0dbb0e62cb2fd4cb824
2022-01-20 23:38:03 +08:00
Jiafei Pan 28279cf2c1 feat(nxp/driver/ifc_nand): add IFC NAND flash driver
Support IFC NAND flash as boot device.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1aba7035ff70b179915e181c04e7b00be2066abe
2022-01-20 23:38:03 +08:00
Jiafei Pan e2fdc77ba4 feat(nxp/driver/ifc_nor): add IFC nor flash driver
Add IFC Nor flash driver.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I3275664b8848d0fe3c15ed92d95fb19adbf57f84
2022-01-20 23:38:03 +08:00
Jiafei Pan ec5fc501f1 feat(nxp/driver/csu): add bypass bit mask definition
Add TZASC_BYPASS_MUX_DISABLE definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ife4d819e2af6deb5e027491d30f6b7c5f79764e7
2022-01-19 11:36:23 +08:00
Jiafei Pan 3a8c9d78d4 feat(nxp/driver/dcfg): add gic address align register definition
Add some register fields definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I9fd78c318b34a2becd82d502fa6d18c8298eb40a
2022-01-19 11:36:23 +08:00
Jiafei Pan fb90cfd4ee fix(nxp/scfg): fix endianness checking
It is a typo to check NXP_GUR_LE in scfg driver.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I4b952bf4136dd626d88fc4797dba2be445395801
2021-10-09 10:56:52 +02:00
Pankaj Gupta 1ff7e46b09 fix(include/drivers/flexspi): fix warm boot wait time for MT35XU512A
Now lx2 which use MT35XU512A supports warm boot, fix the macro
define caused by the commit:
feat(driver/nxp/xspi): add MT35XU02G flash info

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I83eb8cb9a30ac7c7efd5a010acbd03eddebed52b
2021-10-06 14:47:27 +05:30
Jiafei Pan a4f5015a00 feat(driver/nxp/xspi): add MT35XU02G flash info
Add MT35XU02G flash info.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I2dbbdcb454fae4befef71769f9646c077d72a057
2021-09-15 11:19:36 +08:00
Jiafei Pan 6c5d140ed9 feat(driver/nxp/dcfg): define RSTCR_RESET_REQ
Define RSTCR_RESET_REQ for Chassis V3.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I5cb7019baae5fe0d06b3d5e65f185f87ee16ad3a
2021-09-15 11:19:36 +08:00
Jiafei Pan 08695df91d refactor(plat/nxp): refine api to read SVR register
1. Refined struct soc_info_t definition.
2. Refined get_soc_info function.
3. Fixed some SVR persernality value.
4. Refined API to get cluster numbers and cores per cluster.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I3c20611a523516cc63330dce4c925e6cda1e93c4
2021-08-26 10:08:57 +08:00
Pankaj Gupta 050a99a62f refactor: moved drivers hdr files to include/drivers/nxp
NXP drivers header files are moved:
  - from:  drivers/nxp/<xx>/*.h
  - to  :  include/drivers/nxp/<xx>/*.h

To accommodate these changes each drivers makefiles
drivers/nxp/<xx>/xx.mk, are updated.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I3979c509724d87e3d631a03dbafda1ee5ef07d21
2021-08-03 12:19:56 +02:00
Pankaj Gupta 39faa9b291 nxp: adding the smmu driver
NXP SMMU driver API for NXP SoC.
- Currently it supports by-passing SMMU, called only when NXP CAAM
is enabled.
- (TBD) AMQ based SMMU access control: Access Management Qualifiers (AMQ)
  advertised by a bus master for a given transaction.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I23a12928ddedb1a2cf4b396606e35c67e016e331
2021-03-24 09:49:31 +05:30
Kuldeep Singh b525a8f0d2 nxp: add flexspi driver support
Flexspi driver now introduces read/write/erase APIs for complete flash
size, FAST-READ are by default used and IP bus is used for erase, read
and write using flexspi APIs.

Framework layer is currently embedded in driver itself using flash_info
defines.

Test cases are also added to confirm flash functionality currently under
DEBUG flag.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Change-Id: I755c0f763f6297a35cad6885f84640de50f51bb0
2021-03-24 09:49:31 +05:30